Computer Organization & Architecture
50 articles in this topic

Computer Interfaces in COA: Registers, Handshaking and I/O Mode Numericals
Learn how an I/O interface decodes addresses, uses data, status and control registers, coordinates handshakes, and changes CPU occupancy across polling, interrupts and DMA.

COA for GATE: An 8-Week Topic-by-Topic Preparation Plan
Study Computer Organization and Architecture in prerequisite order with an adjustable 80-hour plan, checked numericals, timed practice, and a practical recovery rule.

Computer Memory Basics: Addressability, Capacity and Chip Organisation with Worked Examples
Learn to separate addresses, bytes, words, address lines and data lines. Worked examples cover a 256 KiB byte-addressable memory, chip organisation, and a 16K x 16 expansion.

Computer Instruction Explained: Format, Instruction Cycle and a 16-Bit Worked Example
Decode an illustrative 16-bit load instruction, calculate its effective address, trace fetch through write-back, and learn the errors that change answers.

IEEE 754 Floating-Point Standard: Binary32, Rounding and Worked Examples
Learn how IEEE 754 stores floating-point values, then encode -13.25, decode 0x3F400000, classify special values and reason about rounding errors.

Instruction Formats and Addressing Modes in COA: Complete Guide with Worked Examples
Learn how zero, one, two, and three-address instructions change a program, then solve expanding-opcode and effective-address questions step by step.

Computer Organization and Architecture for GATE: Syllabus Areas, Weightage Pattern and Prep Order
See what COA covers in GATE CS, where recent-paper questions concentrate, and how to sequence pipelining, cache, control and I/O preparation.

Cache Memory Organization in COA: Mapping, Hit Ratio and Worked Examples
Learn cache organization through one 64 KB memory and 1 KB cache example, carried from address fields and mapping to AMAT, writes, replacement and directory size.

Computer Organization and Architecture Basics: Complete Guide with Worked Examples
Follow an instruction from bits through the CPU, memory and I/O, then solve exact examples on overflow, CPI, pipelines, cache fields, AMAT and interrupts.

Pipelining in COA: Speedup, Hazards, and Worked GATE Examples
Build a clear mental model of pipelining, then use it to solve clock-period, speedup, throughput, efficiency, and hazard questions step by step.

Multiprocessors in COA: Concepts, Amdahl's Law and Cache Coherence Worked Examples
Connect multiprocessor classifications, interconnects, memory models, speedup and cache coherence. Then solve the Amdahl and MESI patterns GATE questions rely on.

Input Output Organisation in COA: Programmed I/O, Interrupts and DMA, with Worked Examples
See how Data, Status and Control registers support programmed I/O, interrupts and DMA. Then solve a complete cycle-stealing bandwidth calculation.