Computer Organization & Architecture
53 articles in this topic
Disk Structure and Disk Addressing for GATE: CHS, LBA and Worked Examples
Use one consistent disk geometry to connect platters, surfaces, tracks and sectors with capacity, CHS-to-LBA conversion, address width and access time.
Updated 21 Sep 20265 min read51 viewsComputer Organization & Architecture
Basic Addressing Modes in Computer Architecture: Worked Effective-Address Examples and Exam Traps
Stop mixing up the instruction field, effective address, and operand. Reuse one machine state to calculate each basic addressing mode step by step.
Updated 20 Sep 20266 min readComputer Organization & Architecture
Cache Mapping Techniques and Memory Units: Direct, Associative and Set-Associative Worked Example
Use one address to learn memory-unit conversion, cache organisation and the exact tag, index and offset fields for all three mapping techniques.
Updated 18 Sep 20266 min readComputer Organization & Architecture
Set Associative Mapping: Address Split, LRU Trace and a 4-Way Cache Worked Example
Build set associative mapping from cache lines and sets, then decode 0x2B6D4, trace true LRU in one 4-way set, compare AMAT, and correct common numerical traps.
Updated 17 Sep 20266 min readComputer Organization & Architecture
Instruction Formats and Addressing Modes for GATE: One Cross-Concept COA Problem Solved
Decode one teaching instruction from 0x2E35FFEC, calculate its effective address, read the little-endian value, and trace the result through a five-stage pipeline.
Updated 15 Sep 20266 min readComputer Organization & Architecture
Memory Organisation and Performance: Cache Mapping, AMAT and Worked GATE Examples
Connect cache capacity, address fields and access time through one 32-bit worked system. Then compare mapping choices and solve a past GATE-style field relation.
Updated 14 Sep 20265 min readComputer Organization & Architecture
Instruction Types in Computer Organization: Concepts, Worked Trace and GATE Question Patterns
Classify instructions by the state they change, then trace a toy CPU across registers, flags, memory, a branch, an output port, and the program counter.
Updated 12 Sep 20266 min readComputer Organization & Architecture
Floating-Point Basics: Binary Normalisation, Worked Examples and Exam Patterns
Connect sign, significand, exponent and bias through one continuous toy-format example. Then see exactly why 0.1 needs rounding and how spacing changes with scale.
Updated 11 Sep 20265 min readComputer Organization & Architecture
Disk Access Time and Performance: Formulas, Worked Example and GATE Traps
Learn how seek time, rotational latency and transfer time combine, then apply the formulas to random and contiguous reads without losing track of units.
Updated 10 Sep 20265 min read62 viewsComputer Organization & Architecture
Direct Memory Access (DMA) Explained: Bus Cycles, Transfer Modes and a Worked Example
DMA becomes easier when you trace bus ownership, addresses and timing as one transfer. This guide follows a 6 KiB block through burst, cycle-stealing and transparent modes.
Updated 8 Sep 20266 min read53 viewsComputer Organization & Architecture
Booth’s Algorithm Explained: Signed Binary Multiplication, Full Trace and Exam Traps
Learn how Booth’s Algorithm reads bit pairs, updates fixed-width registers, and shifts them as one field. A four-cycle trace proves why 0011 × 1011 gives -15.
Updated 7 Sep 20266 min read79 viewsComputer Organization & Architecture
Input and Output Devices in COA: Interfaces, Interrupts and DMA with a Worked Example
Input and output devices in COA explained through interfaces, polling, interrupts and DMA, plus a FIFO that fills in 640 microseconds and loses 6 bytes at 700 microseconds.
Updated 5 Sep 20267 min readComputer Organization & Architecture