Computer Organization & Architecture
50 articles in this topic
Pipelining in Computer Architecture: the 5-stage pipeline, speedup, and hazards
Pipelining in computer architecture: the 5-stage pipeline, speedup and throughput formulas, CPI, structural, data and control hazards, and forwarding.
Updated 25 Jul 20265 min read62 viewsComputer Organization & Architecture
Cache memory: mapping techniques and hit ratio, with the exam angle
Cache memory explained: the memory hierarchy, locality, direct, associative and set-associative mapping, plus a worked hit-ratio and access-time example.
11 Jul 20266 min read238 viewsComputer Organization & Architecture