Digital Logic
19 articles in this topic
Shift Registers, Ring and Johnson Counters for GATE: Frequency Division and Timing Numericals Solved
Build a 4-bit ring counter and Johnson counter state by state, then use their mod values to solve frequency-division and maximum-clock questions.
Universal Gates for GATE: Realizing Any Function with Only NAND or Only NOR, and Counting the Minimum Gates
Turn SOP into NAND-only and POS into NOR-only circuits, count every gate, and learn the exact two-input counts for AND, OR, XOR and XNOR.
Multiplexer Realization for GATE: Implementing Any Boolean Function with a Smaller MUX, Solved
Learn why a smaller MUX is enough for a Boolean function, then wire a complete 4:1 example without guessing any data input.
Flip-Flop Conversion for GATE: Excitation Tables and the SR, JK, D, T Conversion Recipe, Solved
Convert one flip-flop into another with the target transition, the available device's excitation table and a K-map. The solved JK-to-T case shows every row.
Sequential circuits: flip-flops, latches and counters explained
Sequential circuits for GATE: SR, D, JK and T flip-flops, excitation tables, latch versus flip-flop, and a fully worked synchronous counter design example.
Boolean algebra and K-map minimization: a worked GATE guide
K-map minimization becomes routine once you can read the groupings. Six Boolean identity pairs, DeMorgan's two theorems, the SOP and POS canonical forms, and a four-variable map traced loop by loop from seven minterms and three don't-cares down to F = B' + A'D.
Number systems and base conversions: binary, octal and hexadecimal explained
Number systems for GATE: binary, octal and hexadecimal, base conversion, r's and (r-1)'s complement, signed representation, BCD and Gray code, worked.