Most 2's complement errors happen before any addition begins. A solver forgets to fix the bit width, reads the sign bit as an ordinary place value, or calls a discarded carry overflow. The twelve GATE previous-year questions here ask you to write -539 in twelve bits, to decode (342)8 as a signed byte, to multiply -6 by +10 inside eight bits, and to read the carry, overflow and sign flags after adding +77 and -23. Each is worth a line of binary or decimal working before you read the explanation. Over 80 more 2's complement questions are available for drilling once these are clean, and the GATE CS Exam Preparation page organises the wider subject.
Fix the bit width and decode the sign before solving
Use these four rules before touching an option:
An
n-bit 2's complement number spans-2^(n-1)through2^(n-1)-1.To negate a number, invert all
nbits and add 1.To increase its width, copy the old sign bit into the new high-order positions.
Signed overflow means the true result lies outside the fixed-width range. A carry alone does not prove it.
For example, compute 22 - 26 in 8 bits. Write +22 = 00010110 and +26 = 00011010. Invert and add 1, so -26 = 11100110. Now 00010110 + 11100110 = 11111100. To decode 11111100, invert and add 1 to get magnitude 00000100, hence the result is -4. There is no signed overflow because +22 and -26 have opposite signs, and -4 is within -128 to +127. Revisit Number Systems and Base Conversions Explained if decimal, binary or hexadecimal conversion is not yet clean.

2's complement MCQs 1-3: encoding negatives and decoding a stored byte
Question 1, GATE 2001
The 2's complement representation of (-539)10 in hexadecimal is
A. ABE
B. DBC
C. DE5
D. 9E7
Answer: C. DE5.
Every option carries three hexadecimal digits, so the width is 12 bits. In hexadecimal +539 is 21B; invert those twelve bits to get DE4 and add 1 for DE5. The independent check is 4096 - 539 = 3557, and 3557 is DE5 in hexadecimal.
Question 2, GATE 2019
In 16-bit 2's complement representation, the decimal number -28 is:
A. 1111 1111 0001 1100
B. 0000 0000 1110 0100
C. 1111 1111 1110 0100
D. 1000 0000 1110 0100
Answer: C. 1111 1111 1110 0100.
Write +28 = 0000 0000 0001 1100. Invert to 1111 1111 1110 0011, then add 1 to get 1111 1111 1110 0100. Cross-check it by sign-extending 8-bit -28, which is 1110 0100, with eight leading 1 bits.
Question 3, GATE 1998
The octal representation of an integer is (342)8. If this were to be treated as an eight bit integer in an 8085 based computer, its decimal equivalent is
A. 226
B. -98
C. 76
D. -30
Answer: D. -30.
Expand each octal digit into three bits, so 342 becomes 011 100 010, which is nine bits, and an eight-bit register keeps only 11100010. The sign bit is 1, so decode it: invert to 00011101, add 1 for 00011110, magnitude 30, hence -30. Option A is the same byte read as the unsigned value 226.
For mixed conversion practice after these basics, solve Number System MCQs: 12 Solved GATE Questions.
2's complement MCQs 4-5: range and sign extension
Question 4, GATE 2013
The smallest integer that can be represented by an 8-bit number in 2's complement form is
A. -256
B. -128
C. -127
D. 0
Answer: B. -128.
At n=8 the range runs from -2^7 = -128 to 2^7 - 1 = +127, so the smallest representable value is -128. Option C, -127, is the 8-bit floor in 1's complement, where one pattern is spent on a second zero. Reclaiming that pattern is what gives 2's complement one more negative value than positive values.
Question 5, GATE 2002
Sign extension is a step in:
A. floating point multiplication
B. signed 16-bit integer addition
C. arithmetic left shift
D. converting a signed integer from one size to another
Answer: D. converting a signed integer from one size to another.
Sign extension copies the old sign bit into each new high-order position. Thus 8-bit -28, or 1110 0100, becomes 1111 1111 1110 0100 at 16 bits and remains -28. Zero extension suits an unsigned value.
2's complement MCQs 6-8: divisibility, multiplication and hexadecimal scaling
Question 6, GATE 2003
Assuming all numbers are in 2's complement representation, which of the following numbers is divisible by 11111011?
A. 11100111
B. 11100100
C. 11010111
D. 11011011
Answer: A. 11100111.
Invert 11111011 to 00000100 and add 1. Its magnitude is 5, so the divisor is -5. The options decode to -25, -28, -41 and -37. Only -25 / -5 = 5 is an integer, so A is divisible.
Question 7, GATE 2004
Let A = 1111 1010 and B = 0000 1010 be two 8-bit 2's complement numbers. Their product in 2's complement is
A. 1100 0100
B. 1001 1100
C. 1010 0101
D. 1101 0101
Answer: A. 1100 0100.
A = 1111 1010 is -6 and B = 0000 1010 is +10, so the product is -60. Write +60 = 0011 1100, invert to 1100 0011, and add 1 to get 1100 0100. It fits in eight bits.
Question 8, GATE 2010
P is a 16-bit signed integer. The 2's complement representation of P is (F87B)16. The 2's complement representation of 8*P is
A. (C3D8)16
B. (187B)16
C. (F878)16
D. (987B)16
Answer: A. (C3D8)16.
The leading F makes P negative. Invert F87B to 0784 and add 1, so P = -0785 = -1925. Then 8P = -15400. Since 15400 = 3C28, invert to C3D7 and add 1 to get C3D8. This lies within -32768 to +32767.
For sign-magnitude, base conversion and IEEE 754 fields, continue with Number Representation and Floating Point MCQs. Fixed-width integer 2's complement and IEEE 754 floating point use different encodings, so treat them as separate drills.
2's complement MCQs 9-10: overflow versus a plain carry-out
Question 9, GATE Information Technology 2004
Using a 4-bit 2's complement arithmetic, which of the following additions will result in an overflow?
(i) 1100 + 1100
(ii) 0011 + 0111
(iii) 1111 + 0111
A. (i) only
B. (ii) only
C. (iii) only
D. (i) and (iii) only
Answer: B. (ii) only.
The 4-bit range is -8 to +7. Case (i) is -4 + -4 = -8 and fits. Case (ii) is +3 + +7 = +10, which wraps to 1010. Case (iii) is -1 + +7 = +6 and fits. Only case (ii) overflows.
Question 10, GATE Information Technology 2008
A processor that has carry, overflow and sign flag bits as part of its program status word (PSW) performs addition of the following two 2's complement numbers 01001101 and 11101001. After the execution of this addition operation, the status of the carry, overflow and sign flags, respectively will be:
A. 1, 1, 0
B. 1, 0, 0
C. 0, 1, 0
D. 1, 0, 1
Answer: B. 1, 0, 0.
01001101 is +77, and 11101001 decodes to -23, so the true sum is +54. Added as unsigned bytes, 77 + 233 = 310, which needs a ninth bit, so the carry flag is 1 even though the stored byte 00110110 is the correct +54. Opposite-sign operands cannot overflow, so the overflow flag stays 0, and the sign bit of the result leaves the sign flag at 0.
2's complement MCQs 11-12: overflow in complete register scenarios
Question 11, GATE 2022
Let R1 and R2 be two 4-bit registers that store numbers in 2's complement form. For the operation R1+R2, which one of the following values of R1 and R2 gives an arithmetic overflow?
A. R1 = 1011 and R2 = 1110
B. R1 = 1100 and R2 = 1010
C. R1 = 0011 and R2 = 0100
D. R1 = 1001 and R2 = 1111
Answer: B. R1 = 1100 and R2 = 1010.
The pairs give A: -5 + -2 = -7; B: -4 + -6 = -10; C: +3 + +4 = +7; D: -7 + -1 = -8. Only B is outside -8 to +7. It wraps to 0110, so two negatives appear to produce +6, a clear overflow warning.
Question 12, GATE Set 1 2024
Consider a system that uses 5 bits for representing signed integers in 2's complement format. In this system, two integers A and B are represented as A=01010 and B=11010. Which one of the following operations will result in either an arithmetic overflow or an arithmetic underflow?
A. A + B
B. A - B
C. B - A
D. 2 * B
Answer: B. A - B.
The 5-bit range is -16 to +15. Here A = +10 and B = -6. The choices give 4, 16, -16 and -12, respectively. Only A-B = 16 lies outside the range. Since -16 is representable, choice C is not an underflow.
2's complement: what your misses point to and the next step
Use your misses as a diagnosis. If Questions 1-5 were weak, revisit bit width, range and sign extension. If Questions 6-8 were weak, decode both operands before multiplying. If Questions 9-12 were weak, write the legal range and decimal operands before inspecting carry bits.
Keep this four-line checklist on your scratch pad:
fix n
write the range
decode both operands
test the true result, then inspect the stored bits
Carry-out matters in unsigned arithmetic. For signed overflow, the quick test is same signs in and the opposite sign out. For the complete Digital Electronics sequence, continue with GATE Guidance by Sanchit Sir.




