Ring and Johnson Counter MCQs: 10 Solved Questions with Explanations

Students often remember that a ring counter circulates a bit and a Johnson counter feeds back a complement, then mix up n, 2n and 2^n under pressure. The key distinctions are feedback direction, intended state count, one-hot decoding, binary sequence order, unused states and Hamming distance. Answer each question before reading its explanation.

Related reading: ripple counter MCQs and sequential circuits and counters.

1. Write the two counter models before solving anything

An n-flip-flop ring counter circulates a one-hot word through direct last-stage feedback and has n intended states. An n-flip-flop Johnson counter, also called a twisted-ring or switch-tail counter, returns the complement and has 2n intended states. Both sit inside a 2^n-state flip-flop space. Revise the wider model in Sequential Circuits: Flip-Flops and Counters.

For n=4, the ring cycle is 1000 -> 0100 -> 0010 -> 0001 -> 1000, giving 4 intended states. The Johnson cycle is 0000 -> 1000 -> 1100 -> 1110 -> 1111 -> 0111 -> 0011 -> 0001 -> 0000, giving 8 intended states. The 4-bit ring cycle has 4 intended states, and the 4-bit Johnson cycle has 8 intended states.

2. Identify the counter from its use and feedback path

Question 1 (UGC NET 2024, Paper 2 August)

Match List I to List II

List - I (Counter) List - II (uses/working)(A) N-bit Ring Counter (I) Uses universal clock(B) Synchronous Counter (II) Counts exactly N states(C) Asynchronous Counter (III) Counts 0 to 9(D) Decimal Counter (IV) Main clock is applied to first flip-flop onlyChoose the correct answer from the options given below:

• A. (A)-(II), (B)-(IV), (C)-(I), (D)-(III)

• B. (A)-(IV), (B)-(II), (C)-(III), (D)-(I)

• C. (A)-(II), (B)-(I), (C)-(IV), (D)-(III)

• D. (A)-(IV), (B)-(I), (C)-(II), (D)-(III)

Answer: C. Check all four pairs: A -> II, since an N-bit ring has N one-hot positions; B -> I, since every synchronous stage uses the common clock; C -> IV, since only the first stage takes the external clock in a ripple chain; and D -> III, since a decimal counter cycles from 0 to 9. The complete four-pair check confirms C. Review the worked solution.

Question 2 (ISRO 2007 and BEL 2007)

Ring counter is analogous to

• A. Toggle Switch

• B. Latch

• C. Stepping Switch

• D. S-R flip flop

Answer: C, Stepping Switch. A ring counter moves one active output per clock and wraps around: 1000 -> 0100 -> 0010 -> 0001 -> 1000. Only one output is selected, like a stepping switch moving contact by contact. A latch or S-R flip flop stores a state but does not describe rotating selection. The analogy concerns output selection, not the storage element inside the circuit. Review the worked solution.

Question 3 (DSSSB 2021, TGT Shift 5)

Which counter is a shift register with its complement output of the last stage connected to the D-input of the first stage?

• A. Synchronous

• B. Twisted Ring

• C. Up

• D. Down

Answer: B, Twisted Ring. Translate the stem as D_first = NOT(Q_last), the Johnson or twisted-ring connection. An ordinary ring returns Q_last without inversion. Starting a 4-bit Johnson counter at zero shows the difference: 0000 -> 1000. The inverted last-stage zero injects the first 1, then repeated shifts grow a block of ones. This growing-ones pattern is a quick confirmation in a feedback diagram. Review the worked solution.

3. Count required flip-flops and recognise one-hot decoding

A ring needs one flip-flop per intended state. A binary counter plus decoder reaches the same one-hot behaviour another way.

Question 4 (ISRO 2015)

A modulus -12 ring counter requires a minimum of

• A. 10 flip-flops

• B. 12 flip-flops

• C. 8 flip-flops

• D. 6 flip-flops

Answer: B, 12 flip-flops. One circulating 1 gives one state per stage, so a MOD-12 ring needs 12 stages. A binary MOD-12 counter needs ceil(log2 12) = 4 flip-flops because 2^3 < 12 <= 2^4. “Ring” rules out logarithmic counting.

Question 5 (GATE 2014, Set 2)

Let k = 2^n. A circuit is built by giving the output of an n-bit binary counter as input to an n-to-2^n decoder. This circuit is equivalent to a

• A. k-bit binary up counter.

• B. k-bit binary down counter.

• C. k-bit ring counter.

• D. k-bit Johnson counter.

Answer: C. Take n=3, so k=2^3=8. The counter supplies 000, 001, ..., 111, and the decoder makes one of eight lines HIGH for each code. The HIGH position advances and repeats, giving 8-bit one-hot ring behaviour. An 8-flip-flop Johnson counter has 16 intended states. Review the worked solution.

Question 6 (Concept check)

A switch-tail ring counter consists of 5 flip-flops. If it has P intended states and reaches a maximum decimal value Q, what are P and Q?

• A. 10, 63

• B. 10, 31

• C. 5, 100

• D. None of the above

Answer: B, P = 10 and Q = 31. A switch-tail ring counter is a Johnson counter, so five stages give P=2n=10 intended states. Five flip-flops represent values from 0 through 2^5-1=31, and the standard Johnson cycle reaches 11111, so Q=31. Review the worked solution.

4. Test each counter statement instead of guessing from one keyword

Audit the claims separately:

• Johnson stages share one clock.

• Ripple stages do not share the external clock directly.

• Ripple propagation accumulates delay.

• A bidirectional counter uses a control input to select up or down.

For a wider set on flip-flops, latches and mixed counter types, use Sequential Circuits MCQs: 11 Solved Flip-Flops. Ring and Johnson practice instead centres on feedback, sequences and intended state counts.

Question 7 (Coal India 2017)

Which of the following statements is FALSE?

• A. Johnson counter is a synchronous counter.

• B. Ripple counter is an asynchronous counter.

• C. Asynchronous counters are slower than synchronous counters.

• D. A counter may count up or count down, but cannot count both up and down.

Answer: D. A is true because Johnson stages share a clock. B is true by the definition of a ripple counter. C is true because ripple delay accumulates. D is false because a direction input selects either sequence. From 00, a 2-bit counter moves to 01 in up mode and 11 in down mode. The hardware supports both. Review the worked solution.

5. Trace a Johnson sequence in binary before reading decimal options

Use this convention: invert the last-stage bit, feed the leftmost stage, and shift right. Finish the binary path before converting to decimal.

Question 8 (GATE 2015, Set 1)

Consider a 4-bit Johnson counter with an initial value of 0000. The counting sequence of this counter is

• A. 0, 1, 3, 7, 15, 14, 12, 8, 0

• B. 0, 1, 3, 5, 7, 9, 11, 13, 15, 0

• C. 0, 2, 4, 6, 8, 10, 12, 14, 0

• D. 0, 8, 12, 14, 15, 7, 3, 1, 0

Answer: D. Trace 0000 -> 1000 -> 1100 -> 1110 -> 1111 -> 0111 -> 0011 -> 0001 -> 0000, then convert to 0 -> 8 -> 12 -> 14 -> 15 -> 7 -> 3 -> 1 -> 0. Four ones enter, then four leave, producing 2n=8 distinct states. A is the mirror sequence under the opposite bit order, but the standard convention gives D. Review the worked solution.

6. Calculate unused states and Hamming distance from the same 4-bit model

Question 9 (NAT)

The number of unused states in 4-bit ring counter and 4-bit Johnson counter are x and y respectively, then the value of x * y is ?

Answer: 96. Keep the three quantities separate:

Thus x*y=12*8=96. Common traps are using 2^n-n for both counters or reading Johnson's 2n as 2^n.

Question 10 (NAT)

Hamming distance is the number of position at which the corresponding symbols are different. The Hamming distance of a ring counter is

Answer: 2. Compare consecutive one-hot states:

Two positions change. 0100 -> 0010 confirms one bit changes from 1 to 0 and another from 0 to 1. Distance is not the flip-flop count.

7. The short version and your next practice step

• Ring uses direct feedback and has n intended states.

• Johnson uses complemented feedback and has 2n intended states.

• The complete register space contains 2^n configurations.

• One-hot decoder outputs behave like a ring counter.

• Adjacent one-hot ring states have Hamming distance 2.

A score of 9-10 means the three state-count formulas are stable. At 7-8, redo Questions 4, 8 and 9 without notes. At 0-6, rebuild both cycles. Then continue with Sync Counter Analysis MCQs for common-clock state equations and transition tables, which differ from the feedback-loop and one-hot models used here.

For the wider map, open CS Fundamentals for Exams and Placements. Use Zero to Hero, Complete CS Course for a full CS foundation. Redraw Question 8 and recompute Question 9 from a blank page before moving on.