Many aspirants remember that a multiplexer is a data selector, yet lose marks when the question shifts to select-line arithmetic, Boolean-function realisation, or cascaded hardware. Attempt all 12 exam questions before checking the formula, substitution, or circuit derivation behind the answer. For a weak basic circuit model, revise combinational circuits, multiplexers, decoders and adders first.
1. Multiplexer basics: data selection, output, and enable control
Q1. RSSB 2022
Which of the following is a combinational logic circuit that has 2ⁿ input lines and a single output line?
(a) Multiplexer
(b) Demultiplexer
(c) Encoder
(d) Decoder
Answer: (a) Multiplexer. With n select lines, a MUX can distinguish 2ⁿ data inputs and route exactly one to its single output. A demultiplexer does the reverse type of routing: it directs one input towards one of several outputs.
Q2. Coal India 2017
Which of the following represents the function of a Multiplexer?
(a) Y = A + B
(b) Y = A | B
(c) Y = A & B
(d) Y = S ? A : B
Answer: (d) Y = S ? A : B. Read the conditional directly. S = 1 makes the output A, while S = 0 makes it B. The other expressions perform fixed logic operations rather than selection.
Q3. BPSC 2024
Which of these pins will allow to activate and deactivate a multiplexer?
(a) Enable pin
(b) Selection pin
(c) Present pin
(d) More than one of the above
(e) None of the above
Answer: (a) Enable pin. EN controls whether the whole device operates. Selection pins choose a data input only after the MUX is enabled. Whether enable is active high or active low depends on the particular IC.
2. MUX select-line arithmetic: solve N = 2^m before touching the options
For a standard MUX, N = 2^m, where N is the number of data inputs and m is the number of select lines. Work it in either direction: m = 4 gives N = 2^4 = 16, m = 5 gives N = 2^5 = 32, and N = 8 gives m = log₂8 = 3.
Q4. GATE 1998
A multiplexer with a 4-bit data select input is a
(a) 4:1 multiplexor
(b) 2:1 multiplexor
(c) 16:1 multiplexor
(d) 8:1 multiplexor
Answer: (c) 16:1 multiplexor. Four selector bits give 2^4 = 16 combinations, from 0000 through 1111. Therefore, they can select one of 16 data inputs.
Q5. DSSSB 2022
Which type of multiplexer has 5 selection lines?
(a) 5 × 1 MUX
(b) 32 × 1 MUX
(c) 32 × 5 MUX
(d) 1 × 5 MUX
Answer: (b) 32 × 1 MUX. Five select lines address 2^5 = 32 data inputs. A standard MUX still has one output, which gives the notation 32 × 1.
Q6. DSSSB 2021
In a multiplexer, the number of input lines is ‘n’ and the number of select lines is ‘m’. Which of the following is correct?
(a) 2ᵐ=n
(b) 2ⁿ=m
(c) 2m-n
(d) 2n-m
Answer: (a) 2ᵐ=n. Rewriting it gives n = 2^m. For an 8 × 1 MUX, 8 = 2^3, so m = 3 select lines.
Q7. DSSSB 2022
Which of the following statements is INCORRECT about 8×1 multiplexer?
(a) It has 8 input lines.
(b) It has only one output line.
(c) It receives binary information from one of 8 input lines and sends it to output line.
(d) It has 2 selection lines.
Answer: (d) It has 2 selection lines. Notice that the stem asks for the incorrect statement. Two bits select only 2^2 = 4 inputs. An 8 × 1 MUX needs three select lines because 2^3 = 8.
For mixed practice beyond selection arithmetic, use these digital electronics combinational-circuit MCQs on MUXes, decoders, and adders.
3. MUX size for any n-variable Boolean function
Shannon expansion gives a practical construction. Choose n−1 variables as select lines. For every select combination, the required data input becomes one of only four possibilities in the remaining variable x: 0, 1, x, or x′. One inverter supplies x′.
Q8. GATE 2007
Suppose only one multiplexer and one inverter are allowed to be used to implement any Boolean function of n variables. What is the minimum size of the multiplexer needed?
(a) 2ⁿ line to 1 line
(b) 2ⁿ⁺¹ line to 1 line
(c) 2ⁿ⁻¹ line to 1 line
(d) 2ⁿ⁻² line to 1 line
Answer: (c) 2ⁿ⁻¹ line to 1 line. For n = 3, two variables act as select lines, so the required size is 2^2 = 4 inputs, or a 4 × 1 MUX. The third variable, its complement, and constants 0 and 1 provide all permitted data-input forms.
4. MUX as a Boolean-function generator: two complete derivations
For a 2 × 1 MUX in which Z = 0 selects X and Z = 1 selects Y, call the output F. Its equation is F = Z′X + ZY. Keeping F separate from the data input Y prevents a common notation mistake.
Q9. GATE 2004
Consider a multiplexer with X and Y as data inputs and Z as control input. Z = 0 selects input X, and Z = 1 selects input Y. What are the connections required to realize the 2-variable Boolean function f = T + R, without using any additional hardware ?
(a) R to X, 1 to Y, T to Z
(b) T to X, R to Y, T to Z
(c) T to X, R to Y, 0 to Z
(d) R to X, 0 to Y, T to Z
Answer: (a) R to X, 1 to Y, T to Z. Substitute X = R, Y = 1, and Z = T:
f = T′R + T·1 = T′R + T = T + R.
The last equality follows by absorption. Check both select values: T = 0 gives f = R, while T = 1 gives f = 1. Both match T + R.
Q10. ISRO 2015
Minimum number of multiplexers required to realize the following function, f = A'B'C + A'B'C' Assume that inputs are available only in true form, and Boolean constants 1 and 0 are available.
(a) 1
(b) 2
(c) 3
(d) 7
Answer: (b) 2, counting 2-to-1 multiplexers. First simplify:
f = A′B′C + A′B′C′ = A′B′(C + C′) = A′B′.
Use two 2-to-1 MUXes. With select A, I0 = 1, and I1 = 0, MUX 1 produces W = A′. With select B, I0 = W, and I1 = 0, MUX 2 produces B′W = A′B′. A single 2-to-1 MUX cannot both create a missing complement and combine it with the other true-form input.
5. Cascading 2-input MUXes into a 2¹⁰-input selector
A full binary selector tree with N data-input leaves needs N−1 two-input MUXes. Each MUX combines two branches into one, and reducing N leaves to one final output takes N−1 combining operations.
Q11. ISRO 2008
How many 2-input multiplexers are required to construct a 2¹⁰ input multiplexer?
(a) 1023
(b) 31
(c) 10
(d) 127
Answer: (a) 1023. Here N = 2^10 = 1024 inputs, so N−1 = 1023 MUXes. A second check is the level sum: 512 + 256 + 128 + 64 + 32 + 16 + 8 + 4 + 2 + 1 = 1023.
6. Why designers use multiplexers, and the wording trap
Q12. DSSSB 2021
Which of the following is an advantage of use of multiplexers?
I. Logic design is simplified.
II. Minimizes IC package count.
III. Simplification of logic expression is not required.
(a) I and II
(b) II and III
(c) I and III
(d) I, II and III
Answer: (d) I, II and III. A MUX can implement a truth table by placing variables or constants on its data inputs. This can simplify the physical design and reduce separate gate packages. Statement III means that algebraic minimisation is not required for a valid MUX implementation, not that simplification is never useful.
7. Multiplexers MCQs: the short revision path
Identity and control, N = 2^m, Boolean-function realisation, cascading, and design use are the five multiplexer skills to retain. If you miss a select-line question, write N = 2^m before trying again. If Q8 to Q10 cause trouble, start with F = S′I0 + SI1 and substitute every given value line by line.
For sequenced concept coverage, continue with GATE Guidance by Sanchit Sir. Use the GATE Test Series for topic-wise timed practice, or browse the wider GATE course and test-series index when you need the next topic.
