Program Control & I/O Handling MCQs: 12 Solved PYQs with Explanations

Program control and I/O handling questions can demand an instruction-class decision, a PC path, a register or memory trace, a flag trace, or an I/O handshake. One missed overwrite or branch changes every later state. Attempt each item before reading its answer, then compare your trace with the worked transitions. For registers, buses, memory capacity and clock timing, solve CPU Organization Basics MCQs first. Then trace control instructions, accumulator loops and I/O signals here. GATE CS Exam Preparation places both in the wider subject.

Program Control and I/O Handling MCQ method: trace state before naming the instruction

Use PC or label | instruction | register or memory before | register or memory after | next PC or flag. Next PC decides control items; data, flags or signals decide others.

A mnemonic can change data and a flag, so trace both. Addressing Modes and Instruction Formats separates operation from operand location.

Basic computer instruction MCQs: skip conditions, branches and accumulator traces

Question 1. Match skip and increment instructions

UGC NET 2023

Match List - I with List - II :

List - I	List - II
(A) SZA	(I) Increment M and skip it zero
(B) SKI	(II) Skip if AC is negative
(C) SNA	(III) Skip if input flag is on
(D) ISZ	(IV) Skip if AC is Zero

Choose the correct answer from the options given below:

• (A) (A)-(II),(B)-(IV),(C)-(I),(D)-(III)

• (B) (A)-(IV),(B)-(III),(C)-(II),(D)-(I)

• (C) (A)-(IV),(B)-(II),(C)-(I),(D)-(III)

• (D) (A)-(III),(B)-(IV),(C)-(II),(D)-(I)

Answer: (B) (A)-(IV),(B)-(III),(C)-(II),(D)-(I). SZA tests zero AC, SKI the input flag, SNA the AC sign, and ISZ increments memory then skips on zero. Only SKI is I/O.

Question 2. Trace a basic-computer program with a store overwrite

UGC NET 2020

The following program is stored in memory unit of the basic computer. What is the content of the accumulator after the execution of program? (All location numbers listed below are in hexadecimal).

Location	Instruction
210	CLA
211	ADD 217
212	INC
213	STA 217
214	LDA 218
215	CMA
216	AND 217
217	1234H
218	9CE2H

• (A) 1002H

• (B) 2011H

• (C) 2022H

• (D) 0215H

Answer: (D) 0215H. CLA, ADD 217, INC give 0000H -> 1234H -> 1235H; STA 217 stores 1235H at M[217]. LDA 218 loads 9CE2H; 16-bit CMA gives 631DH. Thus 631DH AND 1235H = 0215H: 6&1=0, 3&2=2, 1&3=1, D&5=5.

Question 3. Follow unconditional branches before the AND

UGC NET 2019

The following program is stored in the memory unit of the basic computer. Give the content of accumulator register in hexadecimal after the execution of the program.

Location	Instruction
010	CLA
011	ADD 016
012	BUN 014
013	HLT
014	AND 017
015	BUN 013
016	C1A5
017	93C6

• (A) A1B4

• (B) 81B4

• (C) A184

• (D) 8184

Answer: (D) 8184. PC follows 010 -> 011 -> 012 -> 014 -> 015 -> 013, first skipping and then returning to HLT. AC becomes 0000H -> C1A5H -> 8184H: C&9=8, 1&3=1, A&C=8, 5&6=4.

Program-loop MCQs: count the body, the register width and the exit test

Identify the decrementing instruction, counter width, and whether the body precedes the test.

Question 4. LOOP decrements CX and wraps AX

UGC NET 2017

Consider the following program fragment in assembly language:

        mov ax, 0h
        mov cx, 0A h
do loop:
        dec ax
        loop doloop

What is the value of ax and cx registers after the completion of the doloop ?

• (A) ax=FFF5h and cx=0h

• (B) ax=FFF6h and cx=0h

• (C) ax=FFF7h and cx=0Ah

• (D) ax=FFF5h and cx=0Ah

Answer: (B) ax=FFF6h and cx=0h. CX = 000AH makes 10 iterations and ends at zero. With one DEC AX per iteration, 0000H - 000AH = FFF6H in 16 bits.

Question 5. Accumulate a descending B value

UGC NET 2016

The content of the accumulator after the execution of the following 8085 assembly language program, is :

MVI A, 42H
MVI B, 05H
UGC:  ADD B
DCR B
JNZ UGC
ADI 25H
HLT

• (A) 82 H

• (B) 78 H

• (C) 76 H

• (D) 47 H

Answer: (C) 76 H. Adding 05H + 04H + 03H + 02H + 01H = 0FH takes A through 47H, 4BH, 4EH, 50H, 51H. Then 51H + 25H = 76H.

Question 6. Treat BC as one 16-bit loop counter

UGC NET 2014

How many times will the following loop be executed ?

     LXI B, 0007 H
LOP :   DCX B
        MOV A, B
        ORA C
        JNZ LOP

• (A) 05

• (B) 07

• (C) 09

• (D) 00

Answer: (B) 07. DCX B decrements 16-bit BC. B OR C is zero at 0000H; seven decrements get there from 0007H.

Flag and loop-control MCQs: rotate through carry and detect a reset loop

Question 7. Trace Carry through RAR before XOR

UGC NET 2016

The content of the accumulator after the execution of the following 8085 assembly language program, is

MVI A, 35H
MOV B, A
STC
CMC
RAR
XRA B

• (A) 00H

• (B) 35H

• (C) EFH

• (D) 2FH

Answer: (D) 2FH. From 35H = 00110101₂, STC sets Carry and CMC resets it. RAR gives 1AH and Carry 1; 1AH XOR 35H produces 2FH, and XRA resets Carry.

Question 8. Explain why the loop never reaches 256

ISRO 2013

How many number of times the instruction sequence below will loop before coming out of the loop?

A1:  MOV AL, 00H
     INC AL
     JNZ A1

• (A) 1

• (B) 255

• (C) 256

• (D) Will not come out of the loop

Answer: (D) Will not come out of the loop. Each visit resets AL to 00H; INC AL makes 01H, so JNZ is always taken. Neither 255 nor 256 applies because nothing accumulates.

I/O handling MCQs: accumulator output and the INTR-INTA handshake

Question 9. Identify the value actually sent to PORT1

UGC NET 2015

What will be the output at PORT1 if the following program is executed?

MVI B, 82H
MOV A, B
MOV C, A
MVI D, 37H
OUT PORT1
HLT

• (A) 37H

• (B) 82H

• (C) B9H

• (D) 00H

Answer: (B) 82H. MOV A, B puts 82H in the accumulator, which OUT PORT1 sends. The later instructions preserve A; 37H enters only D.

Question 10. Place the CALL opcode on the bus during acknowledge

GATE 2002 | Topic practice

A device employing the INTR line for device interrupt in 8085 puts the CALL instruction on the data bus while:

• (A) INTA is active

• (B) HOLD is active

• (C) READY is active

• (D) None of these

Answer: (A) INTA is active. INTR requests service; during INTA, the device supplies CALL. HOLD requests bus ownership, while READY controls wait states.

Program-control classification MCQs: CALL, LOAD and the return address

Question 11. Separate control transfer from data manipulation

UGC NET 2025

Which of the following are not data manipulation instructions?

A. Call

B. Load

C. And

D. Increment

E. Shift

Choose the correct answer from the options given below:

• (A) C & E only

• (B) A & B only

• (C) D & E only

• (D) A & C only

Answer: (B) A & B only. Call is control transfer; Load is data transfer. And, Increment and Shift manipulate data, irrespective of which register they touch.

Question 12. Store the subroutine return address

KVS 2017

When a subroutine is called, the address of the instruction following the CALL instruction is stored in the ______.

• (A) program counter

• (B) stack

• (C) stack pointer

• (D) accumulator

Answer: (B) stack. The address after CALL is the return address, pushed onto the stack. The stack stores it, the stack pointer marks the top, and the PC enters the subroutine.

Program Control and I/O Handling MCQs: traps, short version and next step

One-minute check: recompute 631DH AND 1235H = 0215H; explain 16-bit 0000H - 000AH = FFF6H; justify AL = 01H at JNZ; recite INTR request -> INTA acknowledge -> CALL opcode on the data bus.

For a broader computer-organization sequence, use GATE Guidance by Sanchit Sir.

Reattempt every missed item. Label each miss PC, AC/register, memory, flag or I/O signal.