Assembly & Assembler Design MCQs: 11 Solved PYQs Explained

Assembly questions are short, but they mix three layers that must stay separate: assembler directives, executable instructions, and arithmetic effects on registers and flags. If you treat ORG, DEC, END and HLT as the same kind of token, you can lose an easy answer before any calculation begins. Language levels, comments, pseudo-instructions, load-and-go assembly, translation tables, debugging, register-pair operations, fixed-width arithmetic and flags each require a different classification or trace. Attempt every question before opening its explanation, and use GATE Guidance by Sanchit Sir for the wider Computer Organization learning path.

Assembly and assembler MCQ method: classify before calculating

Classify each token before inspecting the options:

For arithmetic, note the width, convert both operands, calculate modulo 2^n, and read flags from the fixed-width result and instruction rule. For eight bits, 2^8 = 256. An assembly operand names the source-level object; encoding represents it for the processor.

Language levels and assembly syntax MCQs

Machine language is the CPU's architecture-specific binary form. An assembler translates symbolic assembly and its directives.

Q1. Comment symbol in an assembly program (DSSSB 2022)

Which of the following symbols is used to write a comment in assembly program?

• (A) @

• (B) $

• (C) ;

• (D) %

Answer: (C) ;. Here, a semicolon starts a comment rather than an executable instruction. Other dialects can use different delimiters, so apply this convention only to the syntax tested. Open this PYQ in the practice module.

Q2. Who receives a pseudo-instruction? (DSSSB 2021)

Pseudo instruction is given to ______.

• (A) Compiler

• (B) Linker

• (C) Assembler

• (D) Loader

Answer: (C) Assembler. A pseudo-instruction directs translation, perhaps by setting an origin, defining data or ending the source. It does not specify a CPU operation. Open this PYQ in the practice module.

Q3. Classification of machine-level language (UGC NET 2022)

Machine Level Language is a/an

• (A) Assembly Language

• (B) Low Level language

• (C) High level Language

• (D) Translating Language

Answer: (B) Low Level language. Machine code is directly executable and architecture specific. Assembly is also low level, but its mnemonics still need translation. Open this PYQ in the practice module.

Pseudo-instructions, load-and-go assembly and the location counter

Directives control the assembler; executable instructions control the CPU. Ask whether the token must produce a runnable opcode.

Q4. Load-and-go assembler assertion and reason (UGC NET 2022)

Given below are two statements : one is labelled as Assertion (A) and the other is labelled as Reason (R):

Assertion (A): A load-and-go assembler avoids the overhead of writing the object program out and reading it back in.

Reason (R): This can be done with either one-pass or two pass assembler.

In the light of the above statements, choose the correct answer from the options given below :

• (A) Both (A) and (R) are true and (R) is the correct explanation of (A),

• (B) Both (A) and (R) are true but (R) is (NOT) the correct explanation of (A)

• (C) (A) is true but (R) is false

• (D) (A) is false but (R) is true

Answer: (C) (A) is true but (R) is false. A load-and-go assembler emits translated instructions directly into memory for immediate execution, avoiding an object-file write and read. In this classification it is a one-pass design, so (A) is true and (R) is false. Open this PYQ in the practice module.

Q5. Spot the executable instruction among directives (UGC NET 2021)

Which of the following is not an example of pseudo‐instruction ?

• (A) ORG

• (B) DEC

• (C) END

• (D) HLT

Answer: (D) HLT. ORG, DEC and END control origin, data definition and source termination. HLT produces an opcode that halts the CPU. Open this PYQ in the practice module.

ORG 100
COUNT, DEC 5
START, LDA COUNT
HLT
END

ORG 100 sets the next address to 100. COUNT enters the symbol table at 100 with decimal 5; START enters at 101; HLT occupies 102; and END occupies no address. LDA COUNT and HLT are executable words.

Assembler data structures MCQ

A two-pass assembler records what cannot be resolved immediately. Match each structure to its job.

Q6. Forward references, mnemonic table, segment register table and EQU (UGC NET 2015)

Match the following:

Codes :

• (A) $(a) - (ii), (b) - (iii), (c) - (iv), (d) - (i)$

• (B) $(a) - (iii), (b) - (iv), (c) - (ii), (d) - (i)$

• (C) $(a) - (iv), (b) - (i), (c) - (iii), (d) - (ii)$

• (D) $(a) - (iv), (b) - (iii), (c) - (ii), (d) - (i)$

Answer: (D) (a)-(iv), (b)-(iii), (c)-(ii), (d)-(i). The Forward Reference Table uses linked-list records, the Mnemonic Table stores mnemonics with opcodes, and the Segment Register Table uses an array. EQU is an assembler directive. Open this PYQ in the practice module.

Register-pair instructions and debugging MCQs

Read the fixed destination before the source. Keep debugger controls separate from program behaviour.

Q7. 8085 register-pair addition into HL (UGC NET 2016)

Which of the following 8085 microprocessor instructions performs HL = HL + DE?

• (A) DAD D

• (B) DAD H

• (C) DAD B

• (D) DAD SP

Answer: (A) DAD D. The rule is HL <- HL + rp, so D selects DE while HL stays the destination. DAD H, DAD B and DAD SP instead add HL, BC and SP. Open this PYQ in the practice module.

Q8. What a debugger allows (UGC NET 2014)

Debugger is a program that

• (A) allows to examine and modify the contents of registers

• (B) does not allow execution of a segment of program

• (C) allows to set breakpoints, execute a segment of program and display contents of register

• (D) All of the above

Answer: (C) allows to set breakpoints, execute a segment of program and display contents of register. Option A is real but incomplete. Option B is false because debuggers support controlled execution, so D also fails. Open this PYQ in the practice module.

Eight-bit arithmetic and flag MCQs

Negative eight-bit results wrap modulo 256. Sign follows the result's most significant bit; carry or borrow follows the instruction rule.

Q9. NEG AL with decimal 153 (UGC NET 2018)

Consider the following x86 – assembly language instructions:

MOV AL, 153

NEG AL

The contents of the destination register 𝐴𝐿 (in 8-bit binary notation), the status of Carry Flag (𝐶𝐹) and Sign Flag (𝑆𝐹) after the execution of above instructions, are

• (A) 𝐴𝐿=01100110;𝐶𝐹=0;𝑆𝐹=0

• (B) 𝐴𝐿=01100111;𝐶𝐹=0;𝑆𝐹=1

• (C) 𝐴𝐿=01100110;𝐶𝐹=1;𝑆𝐹=1

• (D) 𝐴𝐿=01100111;𝐶𝐹=1;𝑆𝐹=0

Answer: (D) AL=01100111; CF=1; SF=0. 153 = 0x99 = 10011001₂; NEG gives 0 - 153 mod 256 = 103 = 0x67 = 01100111₂. A non-zero operand sets CF=1, while the result's leading 0 sets SF=0. Open this PYQ in the practice module.

Q10. Subtract BL from AL in eight bits (UGC NET 2017)

The contents of Register (BL) and Register (AL) of 8085 microprocessor are 49H and 3AH respectively. The contents of AL, the status of carry flag (CF) and sign flag (SF) after executing ‘SUB AL, BL’ assembly language instruction, are

• (A) AL = 0FH; CF = 1; SF = 1

• (B) AL = F0H; CF = 0; SF = 0

• (C) AL = F1H; CF = 1; SF = 1

• (D) AL = 1FH; CF = 1; SF = 1

Answer: (C) AL = F1H; CF = 1; SF = 1. AL=3AH=58 and BL=49H=73, so 58-73=-15; eight-bit wrap gives 241 = F1H = 11110001₂. The borrow out of bit 7 sets CF=1, and the leading bit gives SF=1. The question says “8085”, although AL, BL and SUB AL, BL are x86-style notation. Open this PYQ in the practice module.

Q11. Match 8085 instructions to affected flags (UGC NET 2014)

Match the following 8085 instructions with the flags :

Codes :

• (A) a-iv, b-i, c-iii, d-ii

• (B) a-iii, b-ii, c-i, d-iv

• (C) a-ii, b-iii, c-i, d-iv

• (D) a-ii, b-iv, c-i, d-iii

Answer: (D) a-ii, b-iv, c-i, d-iii. XCHG changes no flags; SUB affects all condition flags; and STC changes only carry. DCR affects sign, zero, auxiliary carry and parity, but not carry. Open this PYQ in the practice module.

Assembly and assembler MCQs: traps and next step

One-minute self-test: classify ORG, DEC, END and HLT; place COUNT=100 and START=101; state DAD D as HL <- HL + DE; recompute 153 -> 01100111₂ and 3AH-49H -> F1H.

Then reattempt every missed question after one day. For the broader translator taxonomy, use Types of Software MCQs, which owns compilers, interpreters and machine-language classification; this set stays with assembler directives, translation structures and instruction effects. Instruction Set Architecture MCQs owns fetch and decode cycles, instruction-format arithmetic, addressing modes and RISC/CISC design; this set stays with assembly syntax, assembler tables and fixed-width instruction traces. Use the GATE Test Series for timed practice, or compare courses through GATE CS Exam Preparation.