Comparing the time T1 taken for a single instruction on a pipelined CPU with…
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Comparing the time T1 taken for a single instruction on a pipelined CPU with time T2 taken on a non-pipelined but otherwise identical CPU, we can say that:
- A.
T1 <= T2
- B.
T1 >= T2
- C.
T1 < T2
- D.
T1 is T2 plus the time taken for one instruction fetch cycle
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Correct answer: B
Pipelining improves instruction throughput when many instructions are executed, because different instructions can occupy different pipeline stages at the same time. It does not reduce the latency of a single instruction.
A single instruction in a pipelined CPU still has to pass through all pipeline stages. In addition, pipeline registers/latches may add overhead between stages. Therefore the time for one instruction on the pipelined CPU cannot be less than the time on the otherwise identical non-pipelined CPU.
Hence T1 >= T2. Option B is correct.