A processor takes 12 cycles to complete an instruction I. The corresponding…
2007
A processor takes 12 cycles to complete an instruction I. The corresponding pipelined processor uses 6 stages with the execution times of 3, 2, 5, 4, 6 and 2 cycles respectively. What is the asymptotic speedup assuming that a very large number of instructions are to be executed?
- A.
1.83
- B.
2
- C.
3
- D.
6
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Correct answer: B
Key idea: the pipeline's steady-state throughput is limited by the slowest stage, so the pipeline clock period equals the maximum stage time.
Given unpipelined time per instruction = 12 cycles.
Pipeline stage times (cycles): 3, 2, 5, 4, 6, 2. The pipeline clock period must be at least the maximum stage time = 6 cycles.
In steady state the pipeline completes one instruction every pipeline clock, so steady-state cycles per instruction = 6.
Asymptotic speedup = (unpipelined cycles per instruction) / (steady-state cycles per instruction) = 12 / 6 = 2.
Answer: The asymptotic speedup is 2 (assuming ideal pipeline operation and a very large number of instructions).
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