Programming the Basic Computer (COA): Instruction Set, Assembly Language and Worked Examples

Many COA students know that the Morris Mano Basic Computer has 25 instructions, yet freeze when given a 16-bit hexadecimal word or a loop without SUB or MUL. The gap is rarely theory. It is the habit of writing down I, the opcode and the address before touching memory, and of building subtraction out of CMA, INC and ADD when the instruction set refuses to supply it.

1. The Basic Computer programming model

The machine has 4096 words of 16-bit memory and 12-bit addresses. It provides AC, the 16-bit accumulator; E, a 1-bit carry or extension flip-flop; PC, AR, IR, DR and TR; and 8-bit INPR and OUTR registers. Every calculation passes through AC, shaping every program. The register-transfer notation these registers obey is developed in the Computer Architecture module.

A memory-reference instruction has three fields: bit 15 is I, bits 14 to 12 are the opcode, and bits 11 to 0 are the address. In 0xA304, these are 1, 010 and 0x304.

Use the first hexadecimal digit as a recall rule. Digits 0 to 6 mean direct memory reference, 8 to E indirect memory reference, 7 register reference, and F I/O. Thus 0x7200 has no operand address, while 0x2xxx is always direct LDA.

2. All 25 Basic Computer instructions, grouped by function

The seven memory-reference instructions fall into three groups:

• Data movement: LDA loads a memory word into AC. STA copies AC to memory.

• Arithmetic and logic: ADD adds a memory word to AC and sends the carry to E. AND performs a bitwise AND with AC.

• Control: BUN loads the effective address into PC. BSA stores the return PC at the effective address and branches to the next word. ISZ increments a memory word and skips the next instruction if the result is zero.

The 12 register-reference instructions need no memory operand. CLA, CLE, CMA and CME clear or complement AC or E. CIR and CIL rotate E with AC, and INC increments AC. SPA, SNA, SZA and SZE skip for positive AC, negative AC, zero AC and zero E. HLT stops the computer. Three of these codes are worth memorising: CMA = 0x7200, INC = 0x7020 and HLT = 0x7001.

The six I/O instructions are INP and OUT for byte transfer, SKI and SKO for readiness tests, and ION and IOF for interrupt control.

Programs synthesise the missing operations: subtraction uses CMA + INC + ADD, multiplication uses shift-and-add, and subroutines use BSA. That synthesis is what exams test.

3. Worked example A: decode one instruction by hand

Suppose IR contains 0xA304. Since A = 1010, I = 1, opcode 010 means LDA, and the address is 0x304. It is an indirect load.

Given M[0x304] = 0x0850 and M[0x850] = 0x00C4, the trace is:

1. Read M[0x304], giving effective address 0x850.

2. Read M[0x850], giving operand 0x00C4.

3. Load it: AC = 0x00C4.

If IR had instead contained 0x2304, the leading 2 would make it direct. AC would then receive M[0x304] = 0x0850.

4. Worked example B: assemble and run a complete program

Compute MIN - SUB = 83 - (-23) without a subtraction instruction:

ORG 100
LDA SUB
CMA
INC
ADD MIN
STA DIF
HLT
MIN, DEC 83
SUB, DEC -23
DIF, HEX 0
END

ORG 100 starts at hexadecimal 0x100. DEC and HEX define data, END stops translation, and a comma-terminated label names an address.

Execution loads 0xFFE9, the 16-bit two's-complement form of -23. CMA gives 0x0016; INC gives 0x0017, or +23. Adding 0x0053 gives 0x006A, which STA DIF writes at 0x108. Therefore DIF = 0x006A = 106 = 83 - (-23). The program built subtraction from simpler instructions.

5. Why the assembler needs two passes

Pass 1 advances the location counter and records MIN = 0x106, SUB = 0x107 and DIF = 0x108. Pass 2 substitutes these addresses and emits code.

At LDA SUB, the assembler has not reached the definition of SUB. Two passes resolve this forward reference; one pass would require a placeholder and later backpatch.

6. Exam patterns: loops, multiplication, subroutines and I/O

• Counting loop: initialise CTR, DEC -5. Place ISZ CTR after the body, followed by BUN LOP. Each iteration increments the counter. Only the fifth increment reaches zero and skips the following BUN, so the body runs exactly five times. ISZ skips one instruction, it does not branch.

• Multiplication: test the multiplier's low bit, conditionally add the multiplicand, then shift. CIR carries information through E for the next test.

• Subroutine: BSA SUB placed at 0x120, with SUB = 0x150, writes the return address 0x121 into M[0x150] and continues at 0x151. BUN SUB I at the end of the routine reads M[0x150] and jumps back to 0x121. A fixed return word makes the routine non-re-entrant and non-recursive.

• Polled I/O: SKI and a backward BUN wait for FGI, then INP transfers INPR to AC. SKO and OUT mirror this for output. ION enables interrupts. The interrupt cycle saves PC at 0x000 and branches to 0x001, so 0x000 is the return word.

Assembled under the same rules, that loop is six words:

ORG 100
        CLA          / 0x100: 7800
LOP,    INC          / 0x101: 7020
        ISZ CTR      / 0x102: 6105
        BUN LOP      / 0x103: 4101
        HLT          / 0x104: 7001
CTR,    DEC -5       / 0x105: FFFB
        END

CTR starts at 0xFFFB. The fifth ISZ CTR makes it 0x0000 and skips the BUN, so INC runs exactly five times and AC ends at 0x0005.

For neighbouring COA concepts, continue with pipelining in computer architecture and cache memory mapping and hit ratio.

7. Traps that cost marks

• Misreading the first digit: treating 0xA304 as direct gives 0x0850, not 0x00C4. Write I, opcode and address before reading memory.

• Treating ISZ as a branch: it only skips the next instruction. Write the ISZ and BUN pair together.

• Writing minus as a sign: memory stores -23 as 0xFFE9, not as 0x8017 with a sign bit and not as the bare magnitude 0x0017. Convert negative DEC values before checking pass 2.

• Expecting BSA to push a stack: another call overwrites the fixed return word, destroying the earlier return address.

• Miscounting after ORG: every emitted instruction or data word advances the counter. Use MIN = 0x106 as the check for this listing.

8. How GATE and interviews test Basic Computer programming

GATE questions give a hexadecimal instruction and memory contents, then ask for the effective address or final AC. They also test ISZ, BSA or a sequence that implements subtraction. Recent official GATE syllabuses place machine instructions, addressing modes and I/O under COA. Check the current organising institute's official GATE website for exact wording.

Interviews ask you to implement subtraction or multiplication on an accumulator machine, or explain why this subroutine cannot recurse. The worked program and BSA pattern answer both.

Use the GATE Test Series, Mocks & Topic-wise Tests to practise decode-and-trace questions under time.

The short version is:

• A 16-bit instruction contains I, an opcode and a 12-bit address.

• The first hexadecimal digit identifies direct, indirect, register-reference or I/O form.

• Computation passes through AC, with E carrying an extra bit.

• Subtraction is CMA + INC + ADD; here 83 - (-23) = 106.

• ISZ skips, while BSA saves a return address in the subroutine's first word.

• I/O can use polling loops or interrupts.

For structured COA coverage within full GATE CS preparation, follow GATE Guidance by Sanchit Sir, then return to this program and assemble it once without looking at the table.