DeMux, Decoder and Encoder MCQs: 12 Solved Questions with Explanations

Solve 12 decoder, encoder and demultiplexer questions, then use clear calculations and signal-direction checks to understand every answer.

KnowledgeGate Team

Exam prep & CS education

Updated 16 Aug 20267 min read

A decoder, encoder and demultiplexer can all have many lines on one side, so identifying them by appearance often leads to the wrong answer; ask what information the circuit transforms or routes.

Line direction and line counts come first, then decoder cascading, memory bank selection, priority arbitration and optical resolution. Attempt each question before reading its explanation. For every numerical, write inputs -> outputs, then calculate 2^m before checking the choices, and never count the data input as a select line. Around 50 more practice questions on these three circuits sit inside CS Fundamentals.

1. Decoder, encoder and DeMux in one worked signal map

Circuit

Input/output shape

Job

Exact calibration value

2-to-4 decoder

2 code inputs, 4 outputs

Activate one output for one input code

A1A0 = 10 gives Y2 = 1, with Y0 = Y1 = Y3 = 0

1-to-8 demultiplexer

1 data input, 3 select inputs, 8 outputs

Route one data value to one selected output

D = 1, S2S1S0 = 101 gives Y5 = 1, all other Y lines 0

8-to-3 encoder

8 one-hot inputs, 3 code outputs

Compress the active input number into binary

I7 = 1 gives 111

8-to-3 priority encoder

8 inputs, 3 code outputs

Encode the highest-priority asserted input

If I7 = 1 and I2 = 1, output 111 when I7 has higher priority

Three select bits represent 2^3 = 8 choices, so a 1-to-8 DeMux needs three select lines. Four code bits give 2^4 = 16 patterns, enough for decimal inputs 0 through 9.

A decoder expands n code inputs to 2^n outputs. An encoder compresses up to 2^n one-hot inputs into n outputs. A DeMux routes one input to one of 2^m outputs under m select lines.

Worked signal map showing a 2-to-4 decoder, a 1-to-8 demultiplexer and an 8-to-3 priority encoder with their active output lines.

2. Questions 1-3: identify the circuit and its line direction

Question 1

Which of the following is a combinational circuit?

  • (a) Flip flop

  • (b) Register

  • (c) Decoder

  • (d) Binary counter

Answer: (c) Decoder.

A decoder's present outputs depend only on present inputs, so it is combinational. A flip flop stores one bit, a register stores several bits, and a binary counter advances through a state sequence. Each needs memory, making it sequential rather than combinational. Their outputs can therefore depend on earlier inputs as well as present ones.

Question 2

A device which converts BCD to seven segment is called _____.

  • (a) Encoder

  • (b) Decoder

  • (c) Multiplexer

  • (d) Demultiplexer

Answer: (b) Decoder.

A BCD-to-seven-segment circuit turns a coded digit into its segment-control pattern. BCD 0101 represents decimal 5 and activates segments that draw 5. This expansion is decoding, not compression or routing.

Question 3

A Decimal to Binary Coded Encoder has _____ inputs and _____ outputs.

  • (a) 4; 4

  • (b) 10; 4

  • (c) 4; 10

  • (d) 2; 10

Answer: (b) 10; 4.

Decimal needs ten one-hot inputs, I0 through I9. Three output bits are insufficient because 2^3 = 8, while 2^4 = 16. Thus ten inputs need four outputs. For example, I7 = 1 -> 0111.

3. Questions 4-6: DeMux routing, select lines and the decoder-encoder map

Question 4

A logic circuit that accepts one input and distributes it over several outputs is known as _____.

  • (a) Multiplexer

  • (b) Encoder

  • (c) Flip-flop

  • (d) Demultiplexer

Answer: (d) Demultiplexer.

A DeMux uses select lines to route its one data input. In a 1-to-4 DeMux, D = 1 and S1S0 = 10 send 1 to Y2; others remain 0. A MUX routes many inputs to one output.

Question 5

In a demultiplexer, the number of output lines is n and the number of select lines is m. Which of the following is correct?

  • (a) n = 2ᵐ

  • (b) m = 2ⁿ

  • (c) n = 2m

  • (d) m = 2n

Answer: (a) n = 2ᵐ.

Each select line adds one binary decision, so m lines form 2^m codes. For m = 3, codes 000 through 111 select eight outputs. Thus n = 8 = 2^3. The expression 2m = 6 misses combinations.

Question 6

Match the terms in List-I with the options given in List-II :

List-I: (a) Decoder; (b) Multiplexer; (c) De-multiplexer

List-II: (i) 1 line to 2^n lines; (ii) n lines to 2^n lines; (iii) 2^n lines to 1 line; (iv) 2^n lines to 2^(n-1) lines

Code:

  • (a) (a)-(ii); (b)-(i); (c)-(iii)

  • (b) (a)-(ii); (b)-(iii); (c)-(i)

  • (c) (a)-(ii); (b)-(i); (c)-(iv)

  • (d) (a)-(iv);(b)-(ii); (c)-(i)

Answer: (b) (a)-(ii); (b)-(iii); (c)-(i).

A decoder expands n lines to 2^n outputs, so (a) matches (ii). A MUX selects one of 2^n inputs for one output, matching (iii). A DeMux routes one input to 2^n outputs, matching (i). Option (a) swaps the MUX and DeMux rows.

4. Questions 7-9: mixed statements, decoder cascading and memory banks

Question 7

Which of the following statements is/are true?

(i) A digital multiplexer selects one input from many inputs and outputs the selected one.

(ii) Four select lines are required for a 1-to-16 demultiplexer.

(iii) Eight OR gates are required to implement an octal-to-binary encoder.

  • (a) (i) and (ii)

  • (b) (ii) and (iii)

  • (c) (i) only

  • (d) None of these

Answer: (a) (i) and (ii).

Statement (i) defines a MUX. For (ii), 2^m = 16, so m = 4. Statement (iii) is false. An octal-to-binary encoder has three output equations, with one OR network per output bit, not eight OR gates.

Question 8

How many 3-to-8 line decoders with an enable input are needed to construct a 6-to-64 line decoder without using any other logic gates?

  • (a) 7

  • (b) 8

  • (c) 9

  • (d) 10

Answer: (c) 9.

Feed the upper three bits to one 3-to-8 decoder. Its outputs enable eight second-level decoders receiving the lower three bits. The total is 1 + 8 = 9 devices and 8 x 8 = 64 final outputs. Their enable inputs remove the need for extra gates.

Question 9

Suppose you want to build a memory with 4 byte words with a capacity of 2^21 bits. What is type of decoder required if the memory is built using 2K x 8 RAM chips?

  • (a) 5 to 32

  • (b) 6 to 64

  • (c) 4 to 64

  • (d) 7 to 128

Answer: (a) 5 to 32.

A 4-byte word has 4 x 8 = 32 = 2^5 bits, so the target holds 2^21 / 2^5 = 2^16 words. Four 2K x 8 chips in parallel make a 2K x 32 bank with 2^11 words. We need 2^16 / 2^11 = 2^5 = 32 banks, hence a 5-to-32 decoder.

5. Questions 10-12: encoder resolution, priority arbitration and ROM sizing

Question 10

By using an eight bit optical encoder the degree of resolution that can be obtained is (approximately)

  • (a) 1.8°

  • (b) 3.4°

  • (c) 2.8°

  • (d) 1.4°

Answer: (d) 1.4°.

Eight bits distinguish 2^8 = 256 positions per 360-degree revolution. The resolution is 360 / 256 = 1.40625 degrees per position, approximately 1.4 degrees.

Question 11

The parallel bus arbitration technique uses an external priority encoder and a decoder. Suppose, a parallel arbiter has 5 bus arbiters. What will be the size of priority encoder and decoder respectively?

  • (a) 4×2,2×4

  • (b) 2×4,4×2

  • (c) 3×8,8×3

  • (d) 8×3,3×8

Answer: (d) 8×3,3×8.

Five requests need three code bits because 2^2 = 4 < 5 and 2^3 = 8. An 8 x 3 priority encoder accepts up to eight requests and emits a 3-bit winner code. Reverse selection uses a 3 x 8 decoder. The requested order is encoder, then decoder.

Question 12

A ROM is used to store the table for multiplication of two 8-bit unsigned integers. The size of ROM required is

  • (a) 256 × 16

  • (b) 64K × 8

  • (c) 4K × 16

  • (d) 64K × 16

Answer: (d) 64K × 16.

The operands form the ROM address. They supply 8 + 8 = 16 address bits, giving 2^16 = 65,536 = 64K pairs. The largest product is 255 x 255 = 65,025, requiring 16 output bits. Thus the ROM is 64K x 16.

6. What these 12 questions are really testing

Skill

Questions

Action

Direction and identity

Q1-Q4

Identify the circuit

Binary line counts

Q3, Q5, Q6, Q7

Use 2^m

Hierarchy and bank selection

Q8, Q9

Draw both stages

Numerical applications

Q10-Q12

Separate address count and width

Check these traps before locking an answer:

  • Keep encoder and decoder directions straight.

  • A DeMux data input is not a select line.

  • Use 2^m, not 2m.

  • Count the first-stage decoder.

  • Separate word count from word width.

Use Combinational Circuits MCQs: 12 Solved GATE Questions for adjacent practice. If signal roles still feel mixed, revise Combinational Circuits: MUX, Decoders, Adders.

7. Answer key, retry method and next step

Answer key: 1-C, 2-B, 3-B, 4-D, 5-A, 6-B, 7-A, 8-C, 9-A, 10-D, 11-D, 12-D.

Score 10-12 and you are ready for full combinational-circuit sets. Score 7-9 and the weak spot is line counts and cascading, so redo Q3, Q5, Q6 and Q8. Score 0-6 and redraw the signal map in section 1 from memory before another timed attempt.

Beside each wrong answer, write the circuit direction. Recompute every power of two without the choices, then retry after two days.

For structured CS learning, use Zero to Hero: Complete CS Course. For placement-oriented core-subject revision, use CS Fundamentals for Placements by Sanchit Sir. In short, identify direction, calculate code space, and separate address count from width.