Virtual memory is the Operating Systems chapter that examiners keep returning to, because a single idea, running a program larger than physical RAM by paging it in on demand, spawns an entire family of numericals. GATE, UGC NET, and company placement tests all lean on the same handful of skills: address translation, sizing a page table, computing effective access time, and reasoning about thrashing and frame allocation.
Below are 12 solved MCQs pulled from KnowledgeGate's published question bank, most of them real previous-year questions with the exam and year noted. Attempt each before reading the answer; the explanation is deliberately short, just enough to lock the reasoning in. If a concept feels shaky, the full theory sits in the virtual memory learn module.
A note on the deep links: where a question is a GATE PYQ carried inside the GATE course, we link its exact solved page. The questions drawn from other recruitment papers live in the same module's practice sets, so for those the module link above is your entry point.
Demand paging and virtual memory basics
Q1. Given below are two statements about virtual memory. Statement I: Address translation is performed for every logical address used during the execution of a program. Statement II: A program can execute only when all of its components are loaded in memory. Choose the most appropriate answer. (UGC NET 2023)
(a) Both Statement I and Statement II are correct
(b) Both Statement I and Statement II are incorrect
(c) Statement I is correct, but Statement II is incorrect
(d) Statement I is incorrect, but Statement II is correct
Answer: (c) Statement I is correct, but Statement II is incorrect.
Every logical address the CPU generates passes through translation, via the page table and the TLB, so Statement I holds. Statement II is exactly what virtual memory removes: with demand paging a program runs with only its referenced pages resident, which is also how a process larger than physical RAM executes at all. That makes (c) the right choice.
Q2. Which of the following is/are advantages of virtual memory? (a) Faster access to memory on average (b) Processes can be given protected address spaces (c) Linker can assign addresses independent of where the program will be loaded (d) Programs larger than the physical memory size can be run *(GATE 1999, see the solved page)*
(a) a and b
(b) b and c
(c) b and d
(d) All of the above
Answer: (c) b and d.
Faster average access is simply untrue: address translation and the risk of a page fault make virtual memory slower per reference, not faster. The real wins are isolation through protected address spaces and the ability to run a program bigger than installed RAM. So the intended pair is b and d.
Q3. Locality of reference implies that the page reference being made by a process: *(GATE 1997, see the solved page)*
(a) will always be to the page used in the previous page reference
(b) is likely to be to one of the pages used in the last few page references
(c) will always be to one of the pages existing in memory
(d) will always lead to a page fault
Answer: (b) is likely to be to one of the pages used in the last few page references.
Locality says a process keeps working within a small set of pages over any short interval, so the next reference is probably to a recently used page. Notice the word "likely": nothing is guaranteed, which is why the absolute options (a), (c) and (d) all fail. This tendency is exactly what makes demand paging and caching pay off.
Q4. Any address generated by the CPU is commonly referred to as a _____ where an address seen by the memory unit, the one loaded into the memory address register, is known as _____. (BEL 2023)
(a) absolute address; physical address
(b) logical address; absolute address
(c) logical address; physical address
(d) physical address; relocatable address
Answer: (c) logical address; physical address.
The CPU always emits a logical (virtual) address. The memory-management unit then translates it, and the value that reaches the memory unit and lands in the memory address register is the physical address. Keeping these two names straight is the foundation of every paging numerical.
Q5. Virtual memory is (BEL 2007)
(a) part of main memory only used for swapping
(b) a technique to allow a program, of size more than the size of the main memory, to run
(c) part of secondary storage used in program execution
(d) None of these
Answer: (b) a technique to allow a program of size more than the size of the main memory to run.
Virtual memory is not a piece of hardware; it is a management technique. It lets a process whose logical address space exceeds physical RAM execute by keeping only the needed pages resident and parking the rest on disk. The distractors describe storage regions, not the technique itself.
Page-fault behaviour and access-time numericals
Q6. Consider a machine with 64 MB physical memory and a 32-bit virtual address space. If the page size is 4 KB, what is the approximate size of the page table? *(GATE 2001, see the solved page)*
(a) 16 MB
(b) 8 MB
(c) 2 MB
(d) 24 MB
Answer: (c) 2 MB.
A 32-bit address with 4 KB (2^12 byte) pages gives 2^32 / 2^12 = 2^20 page-table entries. Physical memory of 64 MB holds 2^26 / 2^12 = 2^14 frames, so each frame number needs 14 bits, which rounds to about 2 bytes per entry. Multiplying, 2^20 entries times 2 bytes is 2 MB.
Q7. Page fault occurs when ______. (Coal India 2020)
(a) The page is in main memory
(b) The page has an address, which cannot be loaded
(c) The page is not in main memory
(d) The page is not in cache memory
Answer: (c) The page is not in main memory.
A page fault fires when a process references a page that is not currently resident in main memory, and the OS must fetch it from disk before the access can complete. A page already in RAM needs no fault, and cache misses are handled by hardware below the paging level. Keep the fault tied to main memory and the definition never wobbles.
Q8. Suppose the time to service a page fault is on average 10 milliseconds, while a memory access takes 1 microsecond. Then a 99.99% hit ratio results in an average memory access time of? *(GATE 2000, see the solved page)*
(a) 1.9999 milliseconds
(b) 1 millisecond
(c) 9.999 microseconds
(d) 1.9999 microseconds
Answer: (d) 1.9999 microseconds.
Convert the fault time first: 10 ms is 10,000 microseconds, and the miss ratio is 0.0001. The weighted average is 0.9999 times 1 plus 0.0001 times 10,000, which is 0.9999 plus 1, giving 1.9999 microseconds. A tiny miss rate on a very slow fault still nearly doubles the average, which is the whole point of the question.
Q9. Consider a system with page fault service time S = 100 ns, main memory access time M = 20 ns, and page fault rate P = 65%. Calculate the effective memory access time. (Coal India 2020)
(a) 62 ns
(b) 82 ns
(c) 80 ns
(d) 72 ns
Answer: (d) 72 ns.
A hit takes the 20 ns memory access and a miss takes the 100 ns fault service, weighted by their probabilities. That is 0.35 times 20 plus 0.65 times 100, which is 7 plus 65, giving 72 ns. Read the given rate carefully: here 65% is the fault (miss) rate, not the hit rate.
Thrashing and frame allocation
Q10. In the working-set strategy, which of the following is done by the operating system to prevent thrashing? I. It initiates another process if there are enough extra frames. II. It selects a process to suspend if the sum of the sizes of the working sets exceeds the total number of available frames. *(GATE 2006, see the solved page)*
(a) I only
(b) II only
(c) Neither I nor II
(d) Both I and II
Answer: (d) Both I and II.
The working-set model tracks how many pages each process actively needs, then keeps the total of those sets inside the frames available. When spare frames exist it admits another process, and when the demand overflows the frames it suspends one, both moves aimed squarely at avoiding thrashing. Both statements describe the strategy correctly.
Q11. The minimum number of page frames that must be allocated to a running process in a virtual memory environment is determined by *(GATE 2004, see the solved page)*
(a) the instruction set architecture
(b) page size
(c) physical memory size
(d) number of processes in memory
Answer: (a) the instruction set architecture.
A single instruction may reference several pages at once, for example an operation that reads from one page and writes to another while spanning a page boundary. To ever complete such an instruction, all the pages it touches must be resident together, and that count is fixed by the instruction set. So the architecture sets the floor on frames, not the page size or the amount of RAM installed.
Q12. Thrashing in an operating system is caused by: (CDAC CCAT 2025)
(a) excessive CPU scheduling
(b) excessive paging activity
(c) low interrupt rate
(d) deadlock detection
Answer: (b) excessive paging activity.
Thrashing sets in when processes collectively demand more pages than the frames can hold, so the system spends almost all its time swapping pages in and out rather than executing useful work. CPU utilisation collapses even though the disk stays busy. The cure is to reduce the multiprogramming level or grow the frames each process gets.
Where these 12 fit in your preparation
The set mirrors how the topic is examined: the concept layer of translation, locality and address naming (Q1 to Q5), the page-table sizing, page-fault and effective-access-time core (Q6 to Q9), and the thrashing and allocation questions that close most exam sections (Q10 to Q12). If you missed more than two, the gap is usually the access-time formula, so drill that until the weighting is automatic.
For the theory behind every answer, work through the virtual memory learn module and see where paging sits in the wider syllabus in our Operating Systems for GATE breakdown. GATE aspirants get the full OS sequence inside GATE Guidance by Sanchit Sir; NET aspirants can start from the NET CS category page. Solve, review what you missed, and return to the set a week later, the second pass is where the marks get locked in.
