Consider a 2-bit saturating up/down counter that performs the saturating up…

GATE · 2026 · CS · Set 1 · Computer Science & IT

Consider a 2-bit saturating up/down counter that performs the saturating up count when the input P is 0, and the saturating down count when P is 1. The Next State table of the counter is as shown. The counter is built as a synchronous sequential circuit using D flip-flops.

Which one of the following options corresponds to the expressions for the inputs of the D flip-flops,𝐷1 and 𝐷0?

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