Threading Models MCQs: 12 Solved Operating System Questions with Explanations

Test the boundaries between shared process resources and private thread state through 12 solved PYQs, then revise mapping models, switching and hyper-threading.

KnowledgeGate Team

Exam prep & CS education

Updated 31 Jul 20268 min read

Threading questions become difficult because they mix three separate ideas: what state threads share, who schedules a thread, and how user threads map to kernel threads. If you memorise only "thread equals lightweight process", statement-combination and context-switch questions will still catch you.

Every question below is a previous-year question from a GATE, UGC NET or ISRO paper. Commit to an option before you read the answer. For more attempts, the Threading and Models practice set holds the rest of them.

1. Thread basics MCQs: private state and shared process resources

Threads share code, global data, heap, address space and open files. Each owns its program counter, registers and stack. Revise the boundary with OS Basics MCQs: 12 Solved.

Q1. Lightweight process and virtual-memory state (GATE 2011)

A thread is usually defined as a light weight process because an Operating System (OS) maintains smaller data structure for a thread than for a process. In relation to this, which of the following statement is correct?

  • (A) OS maintains only scheduling and accounting information for each thread

  • (B) OS maintains only CPU registers for each thread

  • (C) OS does not maintain virtual memory state for each thread

  • (D) OS does not maintain a separate stack for each thread

Answer: (C). Same-process threads share one virtual-memory map. The OS still stores stacks, registers, program counters and scheduling state, so A, B and D fail.

Q2. Heap and global variables (GATE 2017, Set 1)

Threads of a process share

  • (A) global variables but not heap

  • (B) heap but not global variables

  • (C) neither global variables nor heap

  • (D) both heap and global variables

Answer: (D). Globals and heap allocations occupy the shared address space. Each thread owns its stack and CPU context.

Q3. Address space versus execution context (GATE 2017, Set 2)

Which of the following is/are shared by all the threads in a process? I. Program counter II. Stack III. Address space IV. Registers

  • (A) (I) and (II) only

  • (B) (III) only

  • (C) (IV) only

  • (D) (III) and (IV) only

Answer: (B). Only III is shared. Program counters, stacks and registers are private because threads follow different instructions, calls and values.

Q4. Protection between threads (GATE 2024, MSQ)

Which of the following statements about threads is/are TRUE?

  • (A) Threads can only be implemented in kernel space

  • (B) Each thread has its own file descriptor table for open files

  • (C) All the threads belonging to a process share a common stack

  • (D) Threads belonging to a process are by default not protected from each other

Answer: (D) only. User-level implementations disprove A. Open files are shared but stacks are private, disproving B and C. A shared address space makes D true.

2. Threading model MCQs: many-to-one, one-to-one and many-to-many

Fix the mapping direction with six user threads:

Model

User threads

Kernel threads in this case

Consequence

Many-to-one

6

1

One blocking call can stall all 6

One-to-one

6

6

Up to 6 schedulable entities, with greater kernel cost

Many-to-many

6

3

Concurrency with fewer kernel threads

The 3 in the last row is this example only, not a many-to-many rule. Each row has a real home: many-to-one is a pure user-space library, one-to-one is Linux and Windows.

Q5. Mapping definitions (UGC NET 2017, November)

User level threads are threads that are visible to the programmer and are unknown to the kernel. The operating system kernel supports and manages kernel level threads. Three different types of models relate user and kernel level threads. Which of the following statements is/are true ?

(a)

(i) The Many - to - one model maps many user threads to one kernel thread

(ii) The one - to - one model maps one user thread to one kernel thread

(iii) The many - to - many model maps many user threads to smaller or equal kernel threads

(b)

(i) Many - to - one model maps many kernel threads to one user thread

(ii) One - to - one model maps one kernel thread to one user thread

(iii) Many - to - many model maps many kernel threads to smaller or equal user threads

Code :

  • (A) (a) is true; (b) is false

  • (B) (a) is false; (b) is true

  • (C) Both (a) and (b) are true

  • (D) Both (a) and (b) are false

Answer: (A). Read mappings from user threads to kernel threads. Group (a) matches the 6-to-1, 6-to-6 and 6-to-3 rows above; group (b) reverses them.

Q6. Linux threading model (ISRO 2023)

Which of the following multithreading model is followed in Linux OS?

  • (A) One User Thread mapping to One Kernel Thread

  • (B) Many User Threads mapping to One Kernel Thread

  • (C) One User Thread mapping to Many Kernel Threads

  • (D) Many User Threads mapping to Many Kernel Threads

Answer: (A). Linux uses one-to-one mapping, so each user-visible thread corresponds to a kernel-schedulable task. Same-process threads can run independently, including on different cores.

3. User-level versus kernel-level thread MCQs

User-level switching avoids a kernel transition and is faster, but the kernel cannot schedule invisible threads independently. Kernel threads cost more to manage, yet one blocked thread need not freeze its siblings, and different processors can run them.

Q7. User-level thread disadvantage (UGC NET 2017, January)

One of the disadvantages of user level threads compared to Kernel level threads is

  • (A) If a user level thread of a process executes a system call, all threads in that process are blocked.

  • (B) Scheduling is application dependent.

  • (C) Thread switching doesn’t require kernel mode privileges.

  • (D) The library procedures invoked for thread management in user level threads are local procedures.

Answer: (A). If the kernel sees only the process, a blocking system call blocks its user threads. C and D are cost advantages; B permits application-specific control.

Q8. Spot the false claim about kernel threads (GATE 2014, Set 1)

Which one of the following is FALSE?

  • (A) User level threads are not scheduled by the kernel.

  • (B) When a user level thread is blocked, all other threads of its process are blocked.

  • (C) Context switching between user level threads is faster than context switching between kernel level threads.

  • (D) Kernel level threads cannot share the code segment

Answer: (D). Same-process kernel threads share one address space and the same code segment. A, B and C describe ordinary many-to-one behaviour and its cheaper switching.

4. Thread context-switch MCQs: what changes, what stays shared and what it costs

For a T1-to-T2 switch, save T1’s stack pointer, program counter and registers, then restore T2’s. Take SP 0x7FF0 -> 0x6FE0 and PC 0x4012 -> 0x51A0 as the worked figures; the page-table base register still points at P0 because both threads share that address space.

Q9. Mode switch versus process switch (GATE 2011)

Let the time taken to switch from user mode to kernel mode of execution be t1 while time taken to switch between two user processes be t2. Which of the following is correct?

  • (A) t1 > t2

  • (B) t1 = t2

  • (C) t1 < t2

  • (D) Nothing can be said about the relation between t1 and t2

Answer: (C). A mode switch only changes privilege level inside one process, so the page tables stay put. A process switch must save all registers, swap the page-table base and usually pay a TLB penalty, which makes t2 the heavier one. Watch the wording here: t1 is a mode switch, not a switch between two user-level threads.

Q10. State saved on a same-process switch (GATE 2023, MSQ)

Which one or more of the following need to be saved on a context switch from one thread (T1) of a process to another thread (T2) of the same process?

  • (A) Page table base register

  • (B) Stack pointer

  • (C) Program counter

  • (D) General purpose registers

Answer: (B), (C) and (D). In the figures above, T1’s SP 0x7FF0, PC 0x4012 and registers go out and T2’s SP 0x6FE0, PC 0x51A0 come in. The page-table base register still points at P0, so A is not saved.

Q11. Saved context and sequential execution (UGC NET 2023, December)

Given below are two statements : Statement (I) : A thread is a dispatchable unit of work that does not executes sequentially and is not interruptible. Statement (II) : It is not possible to alter the behaviour of a thread by altering its context when thread is suspended. In the light of the above statements, choose the most appropriate answer from the options given below :

  • (A) Both Statement I and Statement II are correct

  • (B) Both Statement I and Statement II are incorrect

  • (C) Statement I is correct but statement II are incorrect

  • (D) Statement I is incorrect but statement II are correct

Answer: (B). A thread does run sequentially and the scheduler can preempt it, so Statement I inverts both properties. Statement II fails for the reason Q10 shows: the saved SP, PC and registers decide where a suspended thread resumes, so editing them changes its behaviour.

5. Hyper-threading numerical MCQ

Hardware threads are not the same thing as software mapping models. Hyper-threading exposes logical CPUs per physical core; it does not turn many-to-one mapping into one-to-one.

Q12. Count the logical CPUs (ISRO 2014)

The number of logical CPUs in a computer having two physical quad-core chips with hyper threading enabled is

  • (A) 1

  • (B) 2

  • (C) 8

  • (D) 16

Answer: (D), 16. 2 chips x 4 cores = 8 physical cores. With 2 logical CPUs per core, 8 x 2 = 16 logical CPUs. Eight counts physical cores only.

6. How exams test threading models

More than 40 previous-year questions sit in the threading and models practice sets, landing on the same four cues. Threading sits beside scheduling, deadlocks and memory management, which Operating Systems for GATE maps out.

Question cue

Invariant

Typical trap

Shared by threads

Address space, code, data, heap and open files shared; PC, registers and stack private

Making all resources private

User vs kernel

User switching is faster, but blocking can affect the process

Equating cheap switching with kernel visibility

Mapping model

Read from user threads to kernel threads

Reversing the mapping

Same-process context switch

Save execution context, keep the address-space mapping

Replacing the page-table base

For a 90-second check, draw U above K. Write shared: code/data/heap/files and private: PC/registers/stack. Test each option against it.

7. Threading models MCQs: the short version and next step

Four things to keep exact:

  1. One process address space is shared.

  2. Execution context is per thread.

  3. User threads trade kernel visibility for cheap management.

  4. Mapping direction determines blocking and parallelism.

GATE Guidance by Sanchit Sir teaches operating systems in syllabus order, threads and process creation included, with a practice set on each subtopic. To weigh it against the other routes, see GATE CS Exam Preparation.

Retry only the questions you got wrong, and explain every rejected option aloud before you check the answer again.