The invalid (race) input combination of an SR flip-flop using NOR gates is:

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Answer: D. S = 1, R = 1 — In a NOR-gate SR latch, setting S = 1 and R = 1 drives both outputs low and creates the invalid race condition.

1. A.

   S = 0, R = 0

2. B.

   S = 0, R = 1

3. C.

   S = 1, R = 0

4. D.

   S = 1, R = 1

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