Two's Complement Arithmetic Explained: Signed Ranges, Subtraction, Overflow and Worked Examples

Flipping bits and adding one looks easy until fixed width, signed interpretation, discarded carry, sign extension and overflow enter the same question. Then one bit pattern can appear to change meaning midway. Use one 8-bit notation to encode and decode values, subtract to obtain a negative result, and observe an addition overflow. You can read a word, calculate without changing width, and separate result bits from carry and overflow flags.

1. Two's complement starts with fixed width and place value

For an n-bit word b_(n-1)...b_0, two's complement assigns the value

-b_(n-1)2^(n-1) + sum(b_i 2^i) for i=0 through n-2.

The 8-bit weights are -128, 64, 32, 16, 8, 4, 2, 1. Thus 1110 1110 means -128+64+32+8+4+2=-18. The most significant bit has negative weight. It is not a minus sign attached to an unsigned magnitude.

Of the 2^n patterns, half represent 0 through 2^(n-1)-1 and half represent -2^(n-1) through -1. Hence the range is -2^(n-1) to 2^(n-1)-1: -128 to +127 for 8 bits, and -512 to +511 for 10 bits.

Bits do not declare signedness. 1110 1110 is unsigned 238 or signed -18; context chooses. Number Representation in Digital Electronics: Conversions, Complements and Worked Examples connects base conversion, signed encodings, BCD and floating point, and uses 23-41 to introduce complement subtraction. A reliable two's-complement audit goes further: keep width fixed, decode the retained result, reverse the operation, and judge carry and overflow separately. Place both topics within GATE CS Exam Preparation.

2. Encode and decode two's-complement values without guessing

Decode 1010 0111 in two ways. Its unsigned value is 128+32+4+2+1=167, so its signed value is 167-256=-89. Alternatively, invert it to 0101 1000, add one to get 0101 1001=89, and write -89 in decimal. Both routes agree.

To encode -37, first write all eight bits of +37=0010 0101. Invert them to 1101 1010, then add one:

1101 1010 + 1 = 1101 1011.

Check it as 1101 1011=219 unsigned and 219-256=-37. The modular check, 256-37=219, reaches the same pattern. It verifies the rule rather than replacing it.

Negating 0000 0000 returns zero after the ninth carry is discarded, so there is one zero. Negating 1000 0000 also returns itself because +128 cannot fit in 8-bit signed range. Pad to the chosen width before inverting.

3. Two's-complement subtraction worked example: 23 - 41 = -18

Write 23=0001 0111 and 41=0010 1001. To form -41, invert 0010 1001 to 1101 0110 and add one, giving 1101 0111. Now add without changing width:

  0001 0111   (+23)
+ 1101 0111   (-41)
-----------
  1110 1110

The result is unsigned 238, hence signed 238-256=-18. Check again by inverting to 0001 0001 and adding one to get magnitude 0001 0010=18. Thus 23-41=-18.

Reversing the operation, -23=1110 1001, so 41-23 is 0010 1001 + 1110 1001 = 1 0001 0010. Retain 0001 0010=18. For unsigned subtraction, the discarded carry indicates no borrow; it is neither the signed result nor signed overflow.

4. Carry and signed overflow are different questions

Signed overflow occurs when equal-sign operands produce an opposite-sign result. Equivalently, V=C_(n-1) XOR C_n, the carry into the sign bit XOR carry-out. Carry answers an unsigned question; V answers a signed one.

For 75+60, use 75=0100 1011 and 60=0011 1100:

  0100 1011
+ 0011 1100
-----------
  1000 0111

The result is unsigned 135 but signed 135-256=-121. From the least significant end, C_0...C_8 = 0,0,0,0,1,1,1,1,0, so C_7=1, C_8=0, and V=1. Two positives produced an MSB-1 word because 135 exceeds +127.

5. Width changes, sign extension, truncation and arithmetic shifts

Sign extension copies the sign bit to preserve value. Extend -37=1101 1011 to 1111 1111 1101 1011; it remains -37. Zero extension gives the wrong value, 0000 0000 1101 1011=219. Positive 37=0010 0101 extends to 0000 0000 0010 0101.

Truncation keeps low bits, working modulo 2^n, and is safe only if the value fits. Truncating 300=0000 0001 0010 1100 to eight bits gives 0010 1100=44. Truncating sign-extended -37 back to 1101 1011 preserves it.

Arithmetic-right-shifting 1110 1110 (-18) copies the sign bit, giving 1111 0111 (-9). Logical right shift fills with zero, giving 0111 0111 (119). The former supports signed power-of-two reasoning; the latter treats a bit field. Language and machine conventions can differ for negative values, so these are defined bit operations.

6. Two's-complement traps that produce plausible wrong answers

The counterexamples are decisive. Writing 37=100101 creates an ambiguous six-bit complement; use 0010 0101. Carry-out is 1 in 1111 1001+0000 0111, yet signed -7+7=0 is valid. Conversely, 0100 1011+0011 1100=1000 0111 overflows although carry-out is 0.

Use one safe order: fix width, align bits, compute, retain n result bits, then interpret signedness and flags. Stable-width operands also support recoding and arithmetic shifts in Booth's Algorithm for GATE.

7. Representative two's-complement exam patterns and rapid checks

Exam-style tasks on this topic cover signed ranges, negative encodings, complement subtraction, sign extension, truncation, carry versus overflow, and arithmetic versus logical shifts. For current marks, weightage and paper pattern, check the official notification.

Try these rapid checks, then compare immediately:

1. 10-bit range? -2^9 through 2^9-1, or -512 through +511.

2. Interpret 1110 1010. Unsigned 234; signed 234-256=-22.

3. Encode -54. +54=0011 0110, invert to 1100 1001, add one to get 1100 1010.

4. Calculate 100-60. 0110 0100 + 1100 0100 = 1 0010 1000; retain 0010 1000=40.

5. Check 96+48. 0110 0000 + 0011 0000 = 1001 0000. Two positives attempted 144 but produced a negative-sign pattern, so V=1.

For question-based practice, Number Representation and Floating Point MCQs (COA) revisits signed encodings before floating point.

8. Two's-complement arithmetic: the short version and next step

• Choose width first.

• For MSB 1, signed value is U-2^n.

• Negate by invert-plus-one within that width.

• Subtract with A+(-B).

• Discard carry-out, but inspect V.

• Sign-extend by copying the sign bit.

Recall the checkpoints: -37=1101 1011; 23-41=1110 1110=-18; and 75+60=1000 0111 with signed overflow. Redo all three without looking, including the full carry sequence for 75+60. Decode each result back to decimal and test it against the representable range. Bit manipulation produces a pattern, while width and signedness give that pattern a value.

For a sequenced route that places number representation before arithmetic circuits and computer organisation, continue with GATE Guidance by Sanchit Sir.