1's Complement Explained: Binary Conversion, Addition and Worked Examples

Flipping every bit looks easy until the bit width changes, a negative pattern must be decoded, or an addition produces a carry that cannot simply be discarded. 1's complement uses a declared width, has a defined signed range and dual-zero property, and requires fixed-width conversion, addition, subtraction and error checks. Five-bit words keep every bit and carry visible in the worked arithmetic.

1. What 1's Complement Means in a Fixed-Width Binary Word

For an n-bit word, 1's complement replaces every 0 with 1 and every 1 with 0. It is bitwise NOT over exactly n positions: six-bit 001011 becomes 110100.

Width is part of the representation. Eight-bit 00001011 becomes 11110100. Complementing only the visible 1011 gives 0100, a different four-bit operation.

In signed 1's complement, non-negative integers use ordinary binary with a leading 0. For a negative integer, write its positive magnitude at the declared width and invert every bit. A leading 1 signals a negative value, but the other bits are not an unsigned magnitude. Fixed-width discipline is the foundation for the number representation questions in GATE CS Exam Preparation.

The operator and its interpretation are separate. Bitwise complement creates a pattern; interpreting it as a signed integer is another step. 1's complement represents fixed-width integers, not floating-point values. It uses "1's complement"; searches and textbooks may also write "ones' complement" or "one's complement".

2. Form and Decode 1's Complement Values Step by Step

To form eight-bit -13, convert 13 to binary, pad it and invert. Number Representation in Digital Electronics: Conversions, Complements and Worked Examples compares base conversion, signed representations, codes and floating point. In 1's complement arithmetic, dual zero and end-around carry are the decisive differences.

1. +13 = 00001101

2. Invert all eight positions: 11110010

3. Therefore, eight-bit -13 = 11110010

4. Check: complementing 11110010 gives 00001101, which is magnitude 13.

To decode six-bit 110101, note the leading 1 and invert all six bits to get 001010, decimal 10. Therefore, 110101 represents -10. Six-bit 010101 begins with 0, so its ordinary value is 21.

Zero needs special care. In eight bits, +0 = 00000000; its complement is -0 = 11111111. This is dual zero: two bit patterns for the same numerical value, not two different numbers.

3. Range and the Two-Zero Property

With n bits, leading-0 patterns encode +0 through +(2^(n-1)-1). Their complements encode -0 through -(2^(n-1)-1). The range is:

-(2^(n-1)-1) to +(2^(n-1)-1)

For five bits, 2^(5-1)-1 = 15, so the range is -15 to +15. The 32 patterns give 31 distinct values because 00000 and 11111 both mean zero. Neither +18 nor -18 is representable.

Four bits give a quick checksum: +7 = 0111 and -7 = 1000; +1 = 0001 and -1 = 1110; +0 = 0000 and -0 = 1111 sit at the centre.

4. Worked Addition: End-Around Carry with +9 + (-5)

Set the width and operands before adding. In five bits, +9 = 01001. Start with +5 = 00101 and invert all five bits, giving -5 = 11010.

  01001
+ 11010
-------
1 00011

The leftmost 1 is carry out. Add it at the least significant end: 00011 + 00001 = 00100, or +4. Ordinary arithmetic confirms 9 + (-5) = 4. Discarding the carry would incorrectly give +3.

For a negative result, complement five-bit +9 = 01001 to get -9 = 10110. Then 10110 + 00101 = 11011, with no carry out. Its complement is 00100, so the result is -4, matching -9 + 5 = -4.

5. Subtraction and the Special Case of Negative Zero

Subtraction adds the complemented operand. For five-bit 7-3, write +7 = 00111, +3 = 00011, and -3 = 11100. The raw sum 00111 + 11100 = 1 00011 becomes 00011 + 00001 = 00100, or +4.

Reverse the operands for 3-7. Five-bit +3 = 00011; complement +7 = 00111 to obtain -7 = 11000. Add 00011 + 11000 = 11011. Since the result is negative, complement it to 00100, giving magnitude 4 and therefore -4.

Adding opposites exposes negative zero. Five-bit +5 = 00101 and -5 = 11010 add to 11111, the five-bit -0. It is numerically equal to 00000. A comparison, storage format or later operation may normalise 11111 to 00000; -0 is not a non-zero error result.

6. 1's Complement, Sign-Magnitude and 2's Complement Are Not Interchangeable

Positive patterns match across the three systems, but negatives and zero differ.

At four bits, sign-magnitude and 1's complement range from -7 to +7; 2's complement ranges from -8 to +7. In addition, 1's complement adds carry out back at the low end, while 2's complement discards it.

The pattern 1010 proves why the representation must be named. In four-bit sign-magnitude it is -2; in four-bit 1's complement it is -5; in four-bit 2's complement it is -6. State both the width and the signed representation in every answer.

7. How Exams Test 1's Complement, and the Traps That Cost Marks

Representative tasks ask you to form or decode a fixed-width pattern, derive its range, identify both zeros, use end-around carry, detect overflow, or compare representations.

Try this rapid check, then compare each answer immediately:

1. Eight-bit -22: +22 = 00010110, so -22 = 11101001.

2. Six-bit 111101: complement to 000010, so the value is -2.

3. Five-bit range: -15 to +15.

4. 00110 + 11001 = 11111, which is -0 and numerically zero.

Use Number Representation and Floating Point MCQs (COA) for more of these patterns, then move to the GATE Test Series when you want them under time pressure.

8. 1's Complement: The Short Version and Next Step

Use this six-line revision card:

• Declare the bit width.

• Write the positive magnitude at that width.

• Invert every bit to form the negative encoding.

• Invert a negative pattern again to recover its magnitude.

• Add any carry out back into the least significant end.

• Remember the range -(2^(n-1)-1) to +(2^(n-1)-1) and both zero encodings.

The central results are compact: eight-bit +13 = 00001101 and -13 = 11110010; five-bit +9 + (-5) produces 1 00011, then 00011 + 1 = 00100 = +4; +5 + (-5) = 11111 = -0.

Now rebuild the five-bit addition and both subtraction cases without looking. Then decode 110101 and explain why the answer depends on six-bit 1's complement interpretation. For a structured route that places Number Representation inside broader GATE CS preparation, continue with GATE Guidance by Sanchit Sir.