In a paging scheme, 16-bit addresses are used with a page size of 512 bytes.…

2025

In a paging scheme, 16-bit addresses are used with a page size of 512 bytes. If the logical address is 0000010001111101, how many bits are used for the page number and offset ? Compute the page number and the offset as well. What will be the physical address, if the frame address corresponding to the computed page number is 15 ?

Show answer & explanation

Concept

For a page size of 2p bytes, the p low-order bits of a logical address give the offset within the page.

The remaining high-order bits give the page number. Address translation replaces that page number with the mapped frame number while preserving the offset.

Application

  1. Since 512 = 29, the offset uses 9 bits and the page number uses 16 - 9 = 7 bits.

  2. Split the logical address after 7 bits: 0000010 | 001111101.

  3. The page number is 00000102 = 2, and the offset is 0011111012 = 125 bytes.

  4. The mapped frame number is 15, which is 00011112 in 7 bits.

  5. Preserve the 9-bit offset and replace the page field: 0001111 | 001111101 = 00011110011111012. Thus the physical address is 780510 (0x1E7D).

Cross-check

The original address is 2 × 512 + 125 = 1149, which equals 00000100011111012. The translated address is 15 × 512 + 125 = 7805, and 125 is below the 512-byte page size.

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