Match the following : List - I List - II a. TTL 1. High fan out b. ECL 2. Low…

Concept

Logic families are compared on three standard figures of merit: propagation delay (how quickly a gate switches), power dissipation per gate (the supply power a gate keeps drawing), and fan-out (how many gate inputs one output can drive while still holding valid logic levels). Where a family sits on this speed–power–loading trade-off is decided by two design choices.

• Whether the transistors are allowed to saturate. Saturating a bipolar transistor stores charge in its base, and sweeping that charge out costs storage time, so a non-saturating family switches faster.

• Whether an input draws steady DC current. An input that draws none loads the driving output only capacitively, so one driver can serve far more inputs.

Applying it here

• TTL is a saturating bipolar family. Its input stage and totem-pole output conduct through resistive paths in both logic states, so a standard gate keeps drawing of the order of 10 mW, and each input sinks real base current, holding fan-out to about 10. Among the three properties listed, the one TTL is characterised by is high power dissipation — entry 3.

• ECL steers a fixed emitter current between two branches and never lets its transistors saturate, so there is no storage-time penalty and gate delays fall to roughly 1–2 ns, the fastest of the classical families. Its entry is low propagation delay — entry 2.

• CMOS switches complementary MOS transistors whose gates are insulated capacitors: static current is only leakage, and an input draws essentially no DC current, so one output can hold valid levels across 50 or more inputs. Its entry is high fan out — entry 1.

So a → 3, b → 2, c → 1, which is the code 3 2 1.

Cross-check

The assignment can also be forced by elimination instead of recall. Fan-out is limited by the DC current an input draws, and only CMOS draws essentially none, so entry 1 can only be CMOS. Only ECL avoids saturation, so entry 2 can only be ECL. That leaves entry 3 for TTL.

One honest caveat: ECL also dissipates a great deal of power — often more per gate than TTL — because its current source runs continuously. But in a one-to-one match, giving entry 3 to ECL would force low propagation delay onto TTL or CMOS, and neither of those is the fastest of the three, so the assignment would contradict itself. The standard comparison table therefore pairs each family with the figure of merit it is uniquely known for: TTL with power, ECL with speed, CMOS with fan-out.