Course module

Paper 2 | Digital Computer Organization And Architecture — MPPSC Assistant Professor 2026 – Computer Science (Paper 1 + Paper 2)

Explore the module outline and lessons below. Enroll free to begin studying here.

Lessons: 308
Duration: 27 hr 35 min
PYQs: 407
Practice: 229

6% of this course's PYQ weight is covered in this module.

Syllabus index

Lessons in this module

308 linked lessons

Number System

Basics & Decimal Convert

General Base Conversion

Binary, Octal & Hex

Base 2 Conversion DirectlyDrm Video

Number Representation

Basics to 1s Complement

2s Complement & Math

BCD & Special Codes

Sequential Circuits

Seq. Logic & Latches

Flip-Flops & Conversion

Sync Counter Analysis

Sync Counter Design

Ripple (Async) Counters

Shift Registers

Ring & Johnson Counters

Combinational Circuit

Adders & Subtractors

CLA & Arithmetic Logic

Multiplexers (MUX)

DeMux, Decoder & Encoder

Hazards & Timing

Basics of COA

Introduction, H/W & S/W

Input Output Devices

Basics of Memory

Evolution & History

Computer Classification & Flynn’s Taxonomy

CPU Organization Basics

Instruction Set Architecture (ISA) & Design

Encoding Schemes

Types of Software

Computer Interfaces

Floating Point Rep

Floating Point Basics

IEEE 754 Standards

Booth’s Algorithm

Cache Memory Organization

Memory Chip Configuration

Hierarchy & Locality

Units & Cache Mapping Techniques Basics

Direct Mapping

Associative Mapping

Set Associative Mapping

Cache Replacement Policies & Miss Types

Memory Organisation & Performance

Coherence & Write Policy

Input Output Organisation

Pipelining

Instr Formats & Modes

Register Transfer and Microoperations

Register & Bus Organization

Data Manipulation Micro-Operations

Control Unit Design

Instruction Types

Hardwired & Microprogrammed CU

RISC vs CISC Arch

Programming the Basic Computer

Computer Instruction

Assembly & Assembler Design

Program Control & I/O Handling

Module lessons

Lessons

MPPSC-Unit Test-Digital Computer Organization And ArchitectureTest

Previous-year questions

Lessons in this module

Number System

Basics & Decimal Convert

General Base Conversion

Binary, Octal & Hex

Number Representation

Basics to 1s Complement

2s Complement & Math

BCD & Special Codes

Sequential Circuits

Seq. Logic & Latches

Flip-Flops & Conversion

Sync Counter Analysis

Sync Counter Design

Ripple (Async) Counters

Shift Registers

Ring & Johnson Counters

Combinational Circuit

Adders & Subtractors

CLA & Arithmetic Logic

Multiplexers (MUX)

DeMux, Decoder & Encoder

Hazards & Timing

Basics of COA

Introduction, H/W & S/W

Input Output Devices

Basics of Memory

Evolution & History

Computer Classification & Flynn’s Taxonomy

CPU Organization Basics

Instruction Set Architecture (ISA) & Design

Encoding Schemes

Types of Software

Computer Interfaces

Floating Point Rep

Floating Point Basics

IEEE 754 Standards

Booth’s Algorithm

Cache Memory Organization

Memory Chip Configuration

Hierarchy & Locality

Units & Cache Mapping Techniques Basics

Direct Mapping

Associative Mapping

Set Associative Mapping

Cache Replacement Policies & Miss Types

Memory Organisation & Performance

Coherence & Write Policy

Input Output Organisation

Interface & Addressing

Programmed IO

Interrupt Driven IO

Direct Memory Access DMA

Disk Structure & Address

Disk Access Time & Performance

Pipelining

Pipelining Basics

Performance & Speedup

Structural & Control Hazards

Data Hazards & Soln

Vector Processing Unit

Instr Formats & Modes

Instruction Structure

Basic Addressing Modes

Complex & Rel Modes

Register Transfer and Microoperations

Register & Bus Organization

Data Manipulation Micro-Operations

Control Unit Design

Instruction Types

Hardwired & Microprogrammed CU

RISC vs CISC Arch

Programming the Basic Computer

Computer Instruction

Assembly & Assembler Design

Program Control & I/O Handling

Module lessons

Lessons

Previous-year questions

Explore the course