Which of the following is/are part of an Instruction Set Architecture of a…
2025
Which of the following is/are part of an Instruction Set Architecture of a processor?
Answer: D. The total number of registers — Answer: The total number of registers is part of the Instruction Set Architecture (ISA). Why: The ISA defines programmer-visible state and behavior, including…
- A.
The size of the cache memory
- B.
The clock frequency of the processor
- C.
The number of cache memory levels
- D.
The total number of registers
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Correct answer: D
Answer: The total number of registers is part of the Instruction Set Architecture (ISA).
Why:
The ISA defines programmer-visible state and behavior, including the instruction set, data types and sizes, addressing modes, instruction formats/encodings, and the architected register set (how many registers and their roles).
Contrast with microarchitectural features:
Cache size and the number of cache levels are implementation choices that affect performance but do not change the ISA.
Clock frequency and pipeline depth are hardware-performance parameters, also outside the ISA.
Summary:
Included in ISA: the total number of registers (architected register set) and other programmer-visible details.
Not part of ISA: cache size, number of cache levels, and clock frequency (these are microarchitectural).
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