A certain architecture supports indirect, direct and register addressing modes…
A certain architecture supports indirect, direct and register addressing modes for use in identifying operands for arithmetic instructions. Which of the following cannot be achieved with a single instruction?
Answer: C. specifying an operand value in the instruction such that the value will be used by the operation. — Option A is “register” addressing, which is supported by this architecture. Choice B is also typically covered when manufacturers speak of “register”…
- A.
specifying a register number in the instruction such that the register contains the value of an operand that will be used by the operation.
- B.
specifying a register number in the instruction such that the register will serve as the destination for the operation’s output.
- C.
specifying an operand value in the instruction such that the value will be used by the operation.
- D.
specifying a memory location in the instruction such that the memory location contains the value of an operand that will be used by the operation.
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Correct answer: C
Option A is “register” addressing, which is supported by this architecture.
Choice B is also typically covered when manufacturers speak of “register” addressing, which is supported by this architecture.
Option C is “immediate” (or “literal”) addressing, which is not supported by this architecture. Option D is “direct” (or “absolute”) addressing, which is supported by this architecture