How many memory accesses required by the following instructions (opcode,…
How many memory accesses required by the following instructions (opcode, Destination Register, SourceRegister1, sourceRegister2)?ADD r1, r2, r3MUL r1, r2, (r3)
DIV r1, r2, @ (r4)
Here (r3) represent absolute addressing mode.
And @(r4) represent indirect addressing mode. Suppose every instruction is one word long, as well as every address.
Answer: C. 6 — Solution: The total number of memory accesses is 6. Count one instruction fetch per instruction plus any additional memory reads required by addressing modes.…
- A.
4
- B.
5
- C.
6
- D.
8
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Correct answer: C
Solution: The total number of memory accesses is 6. Count one instruction fetch per instruction plus any additional memory reads required by addressing modes.
ADD r1, r2, r3: Only registers are used, so only the instruction fetch is needed (1 memory access).
MUL r1, r2, (r3): Absolute addressing means the operand is in memory at the address given by r3. Count the instruction fetch (1) plus one memory read to obtain the operand (1) = 2 memory accesses.
DIV r1, r2, @(r4): Indirect addressing requires reading the memory location pointed to by r4 to get the effective address, then reading the operand at that effective address. Count the instruction fetch (1) + read M[r4] (1) + read M[M[r4]] (1) = 3 memory accesses.
Total memory accesses = 1 (ADD) + 2 (MUL) + 3 (DIV) = 6.