A ready bit can be read

Concept: In processor-peripheral interfacing, a status bit and a control bit are distinguished by which side originates the information carried in that bit and which side only consults it. A status bit reports a device condition that only the peripheral itself knows (such as ready/busy), so the peripheral is the one that writes it and the CPU is the one that reads it. A control (command) bit carries an instruction that only the CPU decides, so the CPU is the one that writes it and the peripheral is the one that reads (acts on) it. For each of these two bit types, the writer and the reader sit on opposite sides of the interface.

Application: Available reproductions of the 2007 paper print “read bit,” but that is not the standard name for the device-status flag described by the choices; “ready bit” is the intended term and is used in the corrected stem. A ready bit reports a condition generated by the device. Therefore the peripheral updates the field and the CPU observes it, so the completion “by CPU and written by the peripheral” follows the status-bit access pattern.

Distinguishing the other completions:

• "read and written by CPU" places both the read and the write action on the CPU side. Under the status/control distinction above, that pairing fits neither pattern: it is not a status bit (whose write side is the peripheral) and not a control bit (whose read side is the peripheral), since the peripheral has no role in this pairing at all.

• "read and written by peripheral" places both actions on the peripheral side. That pairing likewise fits neither pattern: it is not a status bit (whose read side is the CPU) and not a control bit (whose write side is the CPU), since the CPU has no role in this pairing at all.

• "read by peripheral and written by CPU" does split the roles across the two sides, but it matches the control-bit pattern instead (the CPU writes the command, the peripheral reads it) -- the opposite pairing from the ready bit the stem describes.

Cross-check: Cross-check with a familiar example: a device-busy or device-ready flag in a UART or printer status register is asserted by the controller hardware and polled (read) by the CPU's driver loop -- confirming the CPU-reads / peripheral-writes direction for a ready bit.