A cache memory needs an access time of 30 ns and main memory 150 ns, what is…

Concept — In a two-level memory hierarchy the processor always looks in the fast level (the cache) first and turns to the slow level (main memory) only when the block it needs is not there. The effective, or average, access time is therefore the fast-level time that every reference pays, plus the slow-level time that only the missing fraction of references pays. Writing H for the hit ratio, Tc for the cache access time and Tm for the main-memory access time, this sequential look-up model reads Tavg = H × Tc + (1 − H) × (Tc + Tm).

Application — substitute the quantities the stem supplies.

1. Given data: Tc = 30 ns, Tm = 150 ns and H = 80% = 0.8, so the miss ratio is 1 − H = 0.2.

2. Hit path: a fraction 0.8 of all references is served by the cache alone at 30 ns each, contributing 0.8 × 30 = 24 ns to the average.

3. Miss path: the remaining fraction 0.2 first probes the cache (30 ns) and then fetches the block from main memory (150 ns), i.e. 30 + 150 = 180 ns each, contributing 0.2 × 180 = 36 ns.

4. Add the two contributions: Tavg = 24 + 36 = 60 ns.

Cross-check — the same model rearranges to Tavg = Tc + (1 − H) × Tm = 30 + 0.2 × 150 = 30 + 30 = 60 ns, which agrees. The average must also fall between 30 ns (were every reference to hit) and 180 ns (were every reference to miss), and 60 ns sits close to the fast end, exactly where a high 80% hit ratio should place it.

A note on conventions — some texts assume simultaneous (parallel) look-up, in which the cache and main memory are searched at the same time, so a miss pays only the 150 ns main-memory access instead of the cache probe followed by the memory access; that model gives Tavg = H × Tc + (1 − H) × Tm = 0.8 × 30 + 0.2 × 150 = 54 ns. The value 54 ns is not among the four values printed on this paper, and the official ISRO answer key for the 2017 Computer Science examination marks 60 ns, so this item is set on the sequential look-up model.