Memory Management Basics and Hierarchy MCQs: 12 Solved Questions with Explanations

Solve 12 published memory-management MCQs with step-by-step explanations covering hierarchy, volatility, locality, MMU translation, address bits, and protection.

KnowledgeGate Team

Exam prep & CS education

Updated 1 Sep 20267 min read

Memory questions mix two views: the hierarchy from cache to storage, and the operating system's job of tracking, translating, allocating, and protecting memory. Memorising isolated definitions makes it easy to confuse speed, capacity, volatility, locality, and address bits.

The questions cover allocation, hierarchy, volatility, access speed, locality, address translation, address width, and protection. Choose an option before reading each explanation, then use the worked steps to identify the rule behind it. For a wider foundation, review CS Fundamentals for Exams & Placements.

Build one memory map before solving

Use this worked teaching machine to separate the levels. Its sizes are illustrative, not universal hardware specifications.

Layer

Illustrative capacity

Relative speed

Volatile?

CPU access route

L1 cache

32 KB

fastest in this example

yes

hardware-managed cache path

L2 cache

256 KB

below L1, above L3

yes

hardware-managed cache path

L3 cache

8 MB

below L2, above RAM

yes

shared cache path

RAM

16 GB

below cache, above SSD

yes

ordinary load/store after address translation

SSD

512 GB

slowest in this example

no

I/O request through the storage stack

Suppose a process accesses pages 7, 8, 7, 9, 7, 8. Reusing pages 7 and 8 shows temporal locality; neighbouring locations inside each page show spatial locality. The MMU translates each process address before RAM access, cache checks occur on the hardware path, and an SSD fetch is I/O rather than direct CPU memory access.

Memory hierarchy from CPU through L1, L2 and L3 caches to RAM and SSD, with speed decreasing and capacity increasing down the levels.

Review Memory Hierarchy and Virtual Memory Explained for a broader explanation of paging, TLBs, and the hierarchy before attempting the set.

Memory-management purpose MCQs 1-2

Question 1

Which of the following is the main purpose of memory management in an operating system?

  • A. To increase CPU speed

  • B. To manage secondary storage

  • C. To allocate and deallocate main memory to processes

  • D. To control input devices

Correct answer: C. To allocate and deallocate main memory to processes.

From an 8 GB free region, assigning P 3 GB and Q 2 GB leaves 3 GB free; reclaiming P raises it to 6 GB. Tracking, allocation, and reuse are memory-management work. CPU speed, storage, and input devices belong elsewhere.

Question 2 (DSSSB 2021, Computer Science, TGT - Shift 4)

Which of the following is a primary task of memory management system?

I. It keeps track of which parts of the memory are currently being used

II. When space is available, it allocates memory to the programs that are next to be loaded

  • A. Only I

  • B. Only II

  • C. Both I and II

  • D. Neither I nor II

Correct answer: C. Both I and II.

Statement I is bookkeeping and Statement II is allocation, so both are correct. After giving P 3 GB and Q 2 GB, the manager records 5 GB used, 3 GB free before testing a request.

Hierarchy and volatility MCQs 3-4

Question 3 (UGC NET 2022, Computer Science, Paper 2 (December))

Which of the following statement is/are false?

A. The processor has direct access to both primary and secondary memory

B. Primary memory stores the active instructions and data for the program being executed on the process

C. Secondary memory is used as a backup memory

D. Memory system is implemented on a single level memory

Choose the correct answer from the options given below:

  • A. A and B only

  • B. B and C only

  • C. A, B and C only

  • D. A and D Only

Correct answer: D. A and D Only.

A is false because secondary storage is reached through I/O, not as directly addressable primary memory. B is true in the item's intended sense because RAM holds active instructions and data. C is true in the broad backup-storage sense. D is false because memory has multiple levels. Therefore A and D are false.

Question 4 (UGC NET 2020, Paper I, October)

With regard to computer memory, which of the following statement(s) is/are TRUE?

(A) Cache memory is 'volatile' memory.

(B) Magnetic memory is 'volatile' memory.

(C) Flash memory is 'volatile' memory.

(D) RAM is 'volatile' memory.

Choose the correct answer from the options given below:

  • A. (A) and (B) only

  • B. (D) only

  • C. (A) and (D) only

  • D. (C) and (D) only

Correct answer: C. (A) and (D) only.

Cache and RAM are volatile, so A and D are true. Magnetic storage and flash are non-volatile. Volatility means losing state without power; it is separate from speed.

Access-speed MCQs 5-6

Question 5 (DSSSB 2018, Computer Science)

With respect to accessing speed, which of the following represents the correct relationships between different categories of cache memory?

  • A. L1 < L2 < L3

  • B. L1 < L3 < L2

  • C. L2 < L1 < L3

  • D. L3 < L2 < L1

Correct answer: D. L3 < L2 < L1.

Here < means lower access speed. L1 is fastest, then L2, then L3, so increasing speed is L3 < L2 < L1. The illustrative capacities do not determine the answer.

Question 6 (BPSC 2023, Computer Science, PGT Tier-2)

Memory in which any location can be reached in a fixed amount of time after specifying its address is called ______.

  • A. Sequential Access Memory

  • B. Random Access Memory

  • C. Secondary Memory

  • D. More than one of the above

  • E. None of the above

Correct answer: B. Random Access Memory.

Random access reaches location 4096 without traversing 0 through 4095; sequential access passes earlier positions first. “Fixed amount” describes the model, not identical latency under caching or contention.

Locality and working-set MCQs 7-9

Question 7

What does the term "Locality of Reference" refer to in the context of memory management?

  • A. Memory Allocation

  • B. Memory Partitioning

  • C. Repeated access to the same or nearby memory locations

  • D. Externally Fragmented Memory

Correct answer: C. Repeated access to the same or nearby memory locations.

In 7, 8, 7, 9, 7, 8, reusing page 7 is temporal locality; nearby regions show spatial locality. The other options do not define locality.

Question 8 (Coal India 2020, Computer Science)

The working set model is used in memory management to implement the concept of:

  • A. Principle of locality

  • B. Thrashing

  • C. Paging

  • D. Segmentation

Correct answer: A. Principle of locality.

A working set contains distinct pages used in a window. For 7, 8, 7, 9, 7, it is {7, 8, 9}, making locality trackable. It helps analyse thrashing; paging and segmentation are different concepts.

Question 9 (Indian Space Research Organization 2013, Computer Science)

Consider the list of page references in the time line as below: 9 6 2 3 4 4 4 4 3 4 4 2 5 8 6 8 5 5 3 2 3 3 9 6 2 7 What is the working set at the penultimate page reference if ∆ is 5?

  • A. {8,5,3,2,9,6}

  • B. {4,3,6,2,5}

  • C. {3,9,6,2,7}

  • D. {3,9,6,2}

Correct answer: D. {3,9,6,2}.

The penultimate reference is 2, before the final 7. The five references ending there are 3, 3, 9, 6, 2. Removing the duplicate gives {3, 9, 6, 2}. A uses too wide a window; C wrongly includes the final 7.

Address translation and address-width MCQs 10-11

Question 10

What is the function of the Memory Management Unit (MMU)?

  • A. To manage the CPU's memory

  • B. To manage the hard disk's memory

  • C. To translate virtual addresses to physical addresses

  • D. To translate physical addresses to virtual addresses

Correct answer: C. To translate virtual addresses to physical addresses.

The MMU maps a process's virtual address to a physical address. With virtual page 6 -> physical frame 19 and offset 37, the page becomes frame 19 while the offset stays 37. D reverses this direction.

Question 11

Consider a logical address space of 64 pages of 1024 words each, mapped onto a physical memory of 32 frames. How many bits are there in the physical address?

  • A. 16

  • B. 15

  • C. 14

  • D. 13

Correct answer: B. 15.

32 frames = 2^5, so the frame field needs 5 bits. 1024 words = 2^10, so the offset needs 10 bits. Total: 5 + 10 = 15 bits. Check: 32 × 1024 = 32,768 = 2^15 words. The 64 pages affect the logical field only.

Physical address split into a 5-bit frame number and a 10-bit word offset, totalling 15 bits for 32 frames of 1024 words each.

Continue with Memory and Paging MCQs: 12 Solved GATE Questions for another numerical practice set.

Memory-protection MCQ 12

Question 12 (DSSSB 2022, Computer Science)

Which of the following statements is INCORRECT about memory protection?

  • A. It is used to protect the operating system from users' processes.

  • B. This protection can be provided by using a relocation register along with a limit register.

  • C. The relocation register contains the largest physical address.

  • D. The limit register contains the range of the logical addresses.

Correct answer: C. The relocation register contains the largest physical address.

With base 12000 and limit 4000, logical address 3500 maps to 12000 + 3500 = 15500. Address 4200 is rejected because 4200 >= 4000. The relocation register stores the starting physical address, not the largest one, so C is incorrect. The other statements fit the base-and-limit model.

The short version and your next step

Check four traps: direct CPU memory access is not SSD I/O; speed and volatility are independent; a working-set window must stop at the stated endpoint; logical addresses use page count, while physical addresses use frame count.

At 10-12, redo Questions 9, 11, and 12 tomorrow without notes. At 7-9, redraw both diagrams and retry the set in 12 minutes. At 0-6, study the linked hierarchy explanation, then repeat.

Memory management tracks and allocates space. Hierarchy trades speed against capacity, locality explains reuse, the MMU translates addresses, and base-plus-limit hardware protects memory. Continue with GATE Guidance by Sanchit Sir for exam-focused study, or ZERO TO HERO for a broad CS sequence.