Consider the following structure of a 2-address instruction in a machine:…
2022
Consider the following structure of a 2-address instruction in a machine: opcode operand1 operand2 8 bits 8 bits 16 bits If the first operand is in a general-purpose register and the second operand is in memory, which of the following statements about the machine is correct?
Answer: A. There are 256 registers and memory size is 64 KB bytes — Concept: In a fixed-width instruction format, an n-bit field used to select among distinct items (registers, memory addresses, opcodes) can represent exactly…
- A.
There are 256 registers and memory size is 64 KB bytes
- B.
There are 8 instructions and 8 registers
- C.
There are 256 registers and 216 KB memory
- D.
There are 256 instructions and 216 KB memory
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Correct answer: A
Concept: In a fixed-width instruction format, an n-bit field used to select among distinct items (registers, memory addresses, opcodes) can represent exactly 2n distinct values. When that field addresses byte-addressable memory, 2n directly gives the number of addressable bytes.
A field's width is the width of the address, not the width of the data stored at it: a 16-bit address field selects among 216 distinct locations, and on a byte-addressable machine each location holds one byte, so the total capacity is 216 bytes — not 216 bits.
Assumption made explicit: the stem gives only the field widths, not the addressable unit. The standard convention for instruction-format questions — and the one the official answer key follows here — is that memory is byte-addressable and the entire address space is implemented, so 216 distinct addresses means 216 bytes of memory. If a machine instead addressed larger units, or left part of the address space unimplemented, the total size would differ; that convention is what fixes it here.
Application to this instruction format:
Opcode field = 8 bits → maximum distinct opcodes = 28 = 256 (this bounds the instruction count, not what the register/memory statements in the options ask about).
Operand1 field = 8 bits and holds a general-purpose register number → number of distinct registers = 28 = 256.
Operand2 field = 16 bits and holds a memory address (byte-addressable) → number of addressable bytes = 216 = 65,536 bytes.
Convert to KB: 65,536 ÷ 1,024 = 64, so the memory size is 64 KB.
Field-by-field summary:
Field | Width | Distinct values it can select |
|---|---|---|
opcode | 8 bits | 28 = 256 opcodes |
operand1 (general-purpose register) | 8 bits | 28 = 256 registers |
operand2 (memory address) | 16 bits | 216 = 65,536 bytes = 64 KB |
Cross-check: 216 bytes is exactly 65,536 — not 216 — confirming that a memory figure written as “216 KB” is a corrupted/miswritten exponent, not a valid unit conversion; 216 × 1,024 = 221,184 bytes is not a power of two, so no whole-bit address field can produce it.
Result: So the machine has 256 registers and 64 KB of addressable memory, matching the statement “There are 256 registers and memory size is 64 KB bytes.”