A 4 bit ripple counter and 4 bit synchronous counter are made using flip-flops…
2026
A 4 bit ripple counter and 4 bit synchronous counter are made using flip-flops having a propagation delay of 10 nsec each. If the worst case delay in the ripple counter and the synchronous counter be R and S respectively, then:
- A.
R = 10 nsec, S = 30 nsec
- B.
R = 30 nsec, S = 10 nsec
- C.
R = 40 nsec, S = 10 nsec
- D.
R = 10 nsec, S = 40 nsec
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Correct answer: C
In a 4-bit ripple counter, the worst-case delay R is the sum of all flip-flop delays: 4 × 10 nsec = 40 nsec. For a synchronous counter, all flip-flops trigger simultaneously, so the worst-case delay S equals one flip-flop's propagation delay (10 nsec).