Match each 8085 instruction with its addressing mode: Item Instruction Mode…
2012
Match each 8085 instruction with its addressing mode:
Item | Instruction | Mode | Addressing mode |
|---|---|---|---|
(a) | ADI | (1) | Immediate addressing |
(b) | STA | (2) | Direct addressing |
(c) | CMA | (3) | Implied addressing |
(d) | SUB r | (4) | Register addressing |
Answer: A. a – 1, b – 2, c – 3, d – 4 — ConceptAn instruction's addressing mode identifies where its operand is specified. The operand may be part of the instruction, stored at an explicitly…
- A.
a – 1, b – 2, c – 3, d – 4
- B.
a – 2, b – 1, c – 4, d – 3
- C.
a – 3, b – 2, c – 1, d – 4
- D.
a – 4, b – 3, c – 2, d – 1
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Correct answer: A
Concept
An instruction's addressing mode identifies where its operand is specified. The operand may be part of the instruction, stored at an explicitly supplied memory address, implied by the opcode, or held in a named register.
In the 8085 instruction set, the mnemonic format and encoded operand determine this classification.
Application
ADI data places the 8-bit data immediately after the opcode, so it uses immediate addressing.
STA address includes the 16-bit memory address of the destination in the instruction, so it uses direct addressing.
CMA has no explicit operand; the accumulator is understood from the opcode itself, so it uses implied addressing.
SUB r names a register as the source operand, so it uses register addressing.
Cross-check and contrast
The instruction lengths and operand fields confirm the mapping: ADI carries immediate data, STA carries an address, CMA carries no operand field, and SUB encodes a register operand.
The mapping a–2, b–1, c–4, d–3 treats ADI as direct and STA as immediate, reversing how their operands are encoded.
The mapping a–3, b–2, c–1, d–4 treats operand-free CMA as immediate rather than implied.
The mapping a–4, b–3, c–2, d–1 assigns register mode to ADI and immediate mode to SUB r, contrary to their explicit operand forms.
Result
Therefore, ADI–Immediate, STA–Direct, CMA–Implied, and SUB r–Register, giving a–1, b–2, c–3, d–4.