Cached and interleaved memories are ways of speeding up memory access between…
2012
Cached and interleaved memories are ways of speeding up memory access between CPUs and slower RAM. Which memory models are best suited (i.e. improve the performance most) for which programs?
(i) Cached memory is best suited for small loops.
(ii) Interleaved memory is best suited for small loops.
(iii) Interleaved memory is best suited for large sequential code.
(iv) Cached memory is best suited for large sequential code.
Answer: B. (i) and (iii) are true. — ConceptCache memory and memory interleaving speed up access through two different mechanisms. A cache is a small, fast store placed between the CPU and RAM…
- A.
(i) and (ii) are true.
- B.
(i) and (iii) are true.
- C.
(iv) and (ii) are true.
- D.
(iv) and (iii) are true.
Attempted by 20 students.
Show answer & explanation
Correct answer: B
Concept
Cache memory and memory interleaving speed up access through two different mechanisms. A cache is a small, fast store placed between the CPU and RAM that retains recently referenced blocks, so it pays off through locality of reference: repeated use of the same words (temporal locality) and use of neighbouring words inside an already-fetched block (spatial locality).
Memory interleaving divides main memory into several independent banks and assigns consecutive addresses to different banks, so successive words can be fetched with their access cycles overlapped. It therefore pays off through bandwidth on a long run of consecutive addresses, and needs no reuse at all.
So the decisive question about a program is: does it reuse a small set of addresses, or does it march once through a long run of new consecutive addresses?
Application
A small loop has a tiny working set that executes many times. After the first pass its instructions and data already sit in the cache, so almost every later reference is a hit that never reaches RAM. Heavy reuse is exactly what a cache converts into speed.
The same small loop gives interleaving little to work with: it keeps re-referencing the same few addresses, which fall in the same bank or two, so there is no long run of fresh consecutive addresses to spread across banks and overlap.
Large sequential code marches through consecutive addresses roughly once, with little reuse. Interleaving is matched to that pattern: words at addresses k, k+1, k+2, ... lie in different banks, so their access cycles overlap and the memory system sustains high bandwidth.
That same stream suits a cache poorly: every new block costs a compulsory miss, and because the code is far larger than the cache, earlier blocks are evicted before they can be reused (capacity misses), so the reuse a cache depends on never materialises.
Matching each mechanism to the program shape it exploits therefore gives: cached memory with small loops, and interleaved memory with large sequential code.
Cross-check
Statement | What it would need in order to pay off | Present in that program? |
|---|---|---|
(i) Cached memory for small loops | Repeated reuse of a small working set | Yes, the loop body is re-executed many times |
(ii) Interleaved memory for small loops | A long run of fresh consecutive addresses | No, the loop revisits the same few addresses |
(iii) Interleaved memory for large sequential code | A long run of fresh consecutive addresses | Yes, the code streams through addresses in order |
(iv) Cached memory for large sequential code | Repeated reuse of a small working set | No, the stream is one-pass and outgrows the cache |
Statements (i) and (iii) therefore hold, while (ii) and (iv) do not.