A computer system supports 32-bit virtual addresses as well as 32-bit physical…

Concept

Virtual memory separates the addresses generated by a program from physical memory addresses. A memory-management unit (MMU), often aided by a translation lookaside buffer (TLB), translates the former to the latter and enforces mapping-related checks.

Equal virtual and physical address widths only make the maximum address ranges equal; they do not, by themselves, make address translation necessary.

Application

1. A 32-bit virtual address space and a 32-bit physical address space each contain 232 addressable locations.

2. Under the examination's stated decision, eliminating virtual memory also eliminates virtual-to-physical address mapping.

3. Hardware dedicated to that mapping is therefore no longer required; this is the intended scope of the statement that hardware support for virtual-to-physical address translation is not needed.

Cross-check and contrast

• Multiuser support depends on isolation and protection, not merely on whether the two address widths are equal.

• Cache efficiency depends on locality and cache organization, so equal address-space sizes do not create the claimed improvement.

• CPU scheduling concerns allocation of processor time and is independent of the equality of virtual and physical address widths.

• In a broader modern design, protection hardware may still be retained even without paging; the official UGC NET key uses memory-management hardware in the narrower address-translation sense.

Thus, in the examination’s intended sense, hardware support for virtual-to-physical address translation is not needed.