On receiving an interrupt request from an I/O device, the CPU:
2011
On receiving an interrupt request from an I/O device, the CPU:
Answer: B. branches to the interrupt service routine after completing the current instruction. — ConceptAn asynchronous hardware interrupt is recognized at a precise instruction boundary so that the processor state remains well defined. After that…
- A.
halts for a predetermined time.
- B.
branches to the interrupt service routine after completing the current instruction.
- C.
branches to the interrupt service routine immediately, before completing the current instruction.
- D.
hands control of the address and data buses to the interrupting device.
Attempted by 75 students.
Show answer & explanation
Correct answer: B
Concept
An asynchronous hardware interrupt is recognized at a precise instruction boundary so that the processor state remains well defined.
After that boundary, the CPU preserves the return context and loads the interrupt-service-routine address from the interrupt vector.
Application
Assume the CPU is executing an ADD instruction when the I/O device raises its interrupt request.
The CPU completes that ADD instruction, so all of its architectural effects are committed at one clear boundary.
The CPU then saves the return state and loads the program counter with the interrupt service routine address.
The interrupt service routine handles the device event; a return-from-interrupt operation later resumes at the next instruction.
Cross-check and contrast
Stopping for a predetermined time describes a fixed delay and supplies no interrupt-vector transfer.
Branching immediately before the current instruction completes would cross an architectural instruction boundary.
Handing over the address and data buses describes direct memory access by a bus master, not entry to an interrupt service routine.
Therefore, the CPU branches to the interrupt service routine after completing the current instruction.