Which of the following statements are NOT true in a pipelined processor? I.…

CONCEPT

Pipeline-hazard remedies address different constraints. Forwarding resolves a RAW dependency only when the producer value is available in time; register renaming removes name dependences such as WAR; branch prediction speculates on control flow but must recover from a wrong prediction.

APPLICATION

1. Statement I: A load-use pair can need a stall because the loaded value becomes available after the immediately following consumer needs its execute-stage input. Therefore, bypassing does not handle every RAW hazard.

2. Statement II: Assigning a new physical destination to a later write prevents it from overwriting the architectural name before an earlier read. Thus register renaming can eliminate register-carried WAR hazards.

3. Statement III: Dynamic prediction reduces average control stalls, but a misprediction still flushes younger speculative instructions and redirects fetch. Therefore, it cannot eliminate every control-hazard penalty.

CROSS-CHECK / CONTRAST

• I and II only combines one unsupported universal claim with one valid renaming claim.

• II and III only combines the valid renaming claim with an unsupported prediction claim.

• All of these would require the renaming claim to be false, although renaming removes the relevant name dependence.

Result: Statements I and III are NOT true, so the answer is I and III only.