In the context of Direct Memory Access (DMA), what role does the Bus Request…
2025
In the context of Direct Memory Access (DMA), what role does the Bus Request signal play?
- A.
It allows the DMA controller to gain control over the system bus.
- B.
It notifies the memory controller to release data.
- C.
It signals the CPU to initiate a memory fetch cycle.
- D.
It instructs the I/O device to start data transmission.
Attempted by 43 students.
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Correct answer: A
In Direct Memory Access (DMA), the Bus Request signal is a critical control line used by the DMA controller to request temporary ownership of the system bus. When an I/O device needs to transfer large amounts of data directly to or from memory without CPU intervention, the DMA controller asserts this signal. The CPU responds by releasing control of the address and data buses (a process called bus arbitration), allowing the DMA controller to take over. This enables high-speed data transfers while freeing the CPU for other tasks.
Option A is correct because the primary function of the Bus Request signal is to initiate this handover, granting the DMA controller control over the system bus.
Option B is incorrect because the memory controller does not release data based on this signal; rather, it responds to address and control signals once the DMA has bus access.
Option C is wrong because the CPU does not initiate a fetch cycle; instead, it relinquishes control.
Option D is inaccurate because the I/O device triggers the DMA controller, not directly via this signal to start transmission.