The multiplicand register and multiplier register of a hardware circuit…

2020

The multiplicand register and multiplier register of a hardware circuit implementing Booth's algorithm hold (11101) and (1100) respectively. The result shall be:

  1. A.

    81210

  2. B.

    -81210

  3. C.

    -1210

  4. D.

    1210

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Show answer & explanation

Correct answer: D

Concept

Booth's algorithm multiplies two signed numbers held in two's-complement form. Each register is interpreted as a signed two's-complement value (a leading 1 marks a negative number), and the algorithm produces the ordinary signed product of those two values. So the first step is always to decode each register into its signed decimal value, then multiply.

Application

  1. Decode the multiplicand register (11101). It has 5 bits and the leading bit is 1, so it is negative. Taking the two's complement: invert 11101 -> 00010, then add 1 -> 00011 = 3. Hence the multiplicand = -3.

  2. Decode the multiplier register (1100). It has 4 bits and the leading bit is 1, so it is negative. Two's complement: invert 1100 -> 0011, then add 1 -> 0100 = 4. Hence the multiplier = -4.

  3. Multiply the decoded signed values: (-3) x (-4). A negative times a negative is positive, with magnitude 3 x 4 = 12.

  4. Therefore the product produced by Booth's algorithm is 1210.

Cross-check

Range sanity check: a 5-bit value lies in [-16, 15] and a 4-bit value in [-8, 7], so any product is bounded by 16 x 8 = 128 in magnitude. A magnitude of 12 sits comfortably inside this range, while values such as 812 are far outside it and cannot be a valid product of these registers - confirming that 1210 is the result.

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