Which architecture uses a single memory for both instructions and data ?

Concept

Computer architectures are classified by how instructions and data are organised in memory. In the Von Neumann (stored-program) model, both instructions and data reside in a single, shared memory and travel over a single shared bus. In the Harvard model, instructions and data are kept in two physically separate memories with independent buses.

Application

1. The stem asks for the architecture that uses ONE memory to hold both instructions and data — that is the defining property of the Von Neumann model.

2. The control unit fetches an instruction from that shared memory using the program counter.

3. On a later cycle, the very same memory and the very same bus are used again to read or write the operand data for that instruction.

4. Because instruction fetches and data accesses compete for the same shared bus, only one of the two can happen per cycle — this shared-bus limitation is known as the Von Neumann bottleneck.

Cross-check

Checking every offered option against the rule “single memory for both instructions and data”:

• Harvard architecture keeps program memory and data memory physically separate with independent buses, which allows simultaneous instruction fetch and data access — the opposite of a single shared memory.

• Superscalar describes a CPU’s ability to issue and execute more than one instruction per clock cycle using multiple execution units; it classifies execution width, not memory organisation.

• RISC describes an instruction-set design philosophy built around a small set of simple, fixed-length instructions executed in one or few cycles; it too classifies instruction-set design, not memory organisation.

Only the shared-memory model fits the stem’s description, which is the Von Neumann architecture.