A micro-instruction format has micro-ops field which is divided into three…
2017
A micro-instruction format has micro-ops field which is divided into three subfields F1, F2, F3 each having seven distinct micro-operations, condition field CD for four status bits, branch field BR having four options used in conjunction with address field ADF. The address space is of 128 memory locations. The size of micro-instruction is :
- A.
17 bits
- B.
20 bits
- C.
24 bits
- D.
32 bits
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Correct answer: B
Answer: 20 bits
Calculation details:
Micro-ops field (three subfields F1, F2, F3): each subfield must encode 7 distinct micro-operations, so bits required per subfield = ceil(log2(7)) = 3 bits. Total for micro-ops = 3 × 3 = 9 bits.
Condition field (CD): selects one of four status bits → bits required = ceil(log2(4)) = 2 bits.
Branch field (BR): four branch options → bits required = ceil(log2(4)) = 2 bits.
Address field (ADF): address space of 128 locations → bits required = log2(128) = 7 bits.
Total size = 9 (micro-ops) + 2 (condition) + 2 (branch) + 7 (address) = 20 bits.