The cache coherence problem can be solved A. by having multiport memory B.…

Answer: allowing only nonshared data to be stored in cache and using a snoopy cache controller (the combination "allow only nonshared data in cache" and "using a snoopy cache controller").

Why: Cache coherence is the problem of keeping multiple cached copies of the same memory location consistent when processors can read and write shared data.

• Allowing only nonshared data to be stored in cache

  If cached data is never shared across processors, there are no multiple cached copies to keep consistent, so coherence issues do not arise. This is a valid but restrictive way to avoid coherence problems.

• Using a snoopy cache controller

  Snoopy controllers monitor bus transactions and implement coherence protocols (for example MSI, MESI) so that when one processor writes a shared line other caches update or invalidate their copies. This actively maintains coherence for shared cached data.

• Why multiport memory is not a coherence solution

  Multiport memory enables multiple simultaneous accesses to main memory but does not coordinate or update multiple cached copies; it does not provide a mechanism to keep caches coherent.

• Why memory interleaving is not a coherence solution

  Memory interleaving distributes addresses across banks to improve throughput and latency, but it does not address the consistency of cached copies across processors.

Summary: The practical coherence solutions are to prevent shared cached copies (avoid caching shared data) or to use coherence protocols implemented by snoopy controllers. Multiport memory and memory interleaving do not solve cache coherence.