A processor that has carry, overflow and sign flag bits as part of its program…
2009
A processor that has carry, overflow and sign flag bits as part of its program status word (PSW) performs addition of the following two 2’s complement numbers 01001101 and 11101001. After the execution of this addition operation, the status of the carry, overflow and sign flags, respectively will be
- A.
1, 1, 0
- B.
1, 0, 0
- C.
0, 1, 0
- D.
1, 0, 1
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Correct answer: B
The addition of 01001101 (+77) and 11101001 (-23) results in 54 (00110110). The carry flag is 1 due to a carry-out from the MSB. Overflow is 0 because operands have opposite signs, which prevents overflow. The sign flag is 0 as the result's MSB indicates a positive number.
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