A flip-flop has a 20-nano second delay from the time its CP input goes from 1…
2017
A flip-flop has a 20-nano second delay from the time its CP input goes from 1 to 0 to the time the output is complemented. What is the maximum delay in a 16-bit binary ripple counter that uses these flip-flops?
Answer: B. 320 ns — In a binary ripple (asynchronous) counter, flip-flops are connected in a chain. The clock pulse cascades sequentially from one stage to the next. Therefore,…
- A.
20 ns
- B.
320 ns
- C.
36 ns
- D.
16 ns
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Correct answer: B
In a binary ripple (asynchronous) counter, flip-flops are connected in a chain. The clock pulse cascades sequentially from one stage to the next. Therefore, the propagation delays of all individual flip-flops accumulate linearly to create the worst-case maximum total delay.
Formula:
Maximum Total Delay = n x tpd
Given data:
Number of bits/stages (n) = 16
Propagation delay per flip-flop (tpd) = 20 ns
Substituting the values:
Maximum Total Delay = 16 x 20 ns =320 ns
Thus, the correct option is B.
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