A byte-addressable computer has a memory capacity of 2m KB (kilobytes) and can…

Concept

In a byte-addressable memory, each byte has a distinct address, so the address-field width is the base-2 logarithm of the total number of bytes. An instruction’s width is the sum of its opcode field and all operand-address fields.

Application

1. Convert the capacity to bytes: 2m KB = 2m × 210 bytes = 2(m+10) bytes.

2. Therefore, one memory address requires log2(2(m+10)) = m + 10 bits.

3. Three operand addresses require 3(m + 10) = 3m + 30 bits.

4. With 2n possible operations, the opcode requires n bits.

5. Hence the minimum required instruction width is n + 3m + 30 bits.

Cross-check

The field-width sum is n + (m + 10) + (m + 10) + (m + 10), which again simplifies to n + 3m + 30. This expression is absent from the three explicit algebraic choices.

Result

Therefore, the applicable choice is “none of the above.”