A CPU generates 32-bit virtual addresses. The page size is 4 KB. The processor…

For any set-associative addressing structure - a cache or a TLB - the address first splits into an offset (the bits needed to select a byte within one page or block, sized log2(page/block size)) and a page/block number. When the structure holds S sets, that page/block number further splits into an index of log2(S) bits, which selects the set, and a tag - the remaining upper bits - which identifies which resident entry within that set the address belongs to. The number of sets S equals the total entries divided by the associativity (number of ways).

1. The page size is 4 KB = 2^12 bytes, so the offset is 12 bits.

2. The virtual address is 32 bits, so the virtual page number (VPN) is 32 - 12 = 20 bits.

3. The TLB holds 128 entries at 4-way associativity, so the number of sets is 128 / 4 = 32.

4. The index needs log2(32) = 5 bits to select one of the 32 sets.

5. The tag is the remaining VPN bits: 20 - 5 = 15 bits.

Check: offset (12) + index (5) + tag (15) = 32 bits, exactly the virtual address width; and 32 sets x 4 ways = 128 entries, matching the given TLB size. So the minimum TLB tag size is 15 bits.