Consider a paging system that uses 1-level page table residing in main memory…
2020
Consider a paging system that uses 1-level page table residing in main memory and a TLB for address translation. Each main memory access takes 100 ns and TLB lookup takes 20 ns. Each page transfer to/from the disk takes 5000 ns. Assume that the TLB hit ratio is 95%, page fault rate is 10%. Assume that for 20% of the total page faults, a dirty page has to be written back to disk before the required page is read from disk. TLB update time is negligible. The average memory access time in ns (round off to 1 decimal places) is ___________ .
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Correct answer: 154.5
Approach: A TLB lookup (20 ns) is performed for every memory reference. If the TLB hits, one memory access (100 ns) is needed. If the TLB misses, the page table in memory must be accessed (100 ns) and then the data memory access (100 ns). Page faults occur only on TLB misses; the given page fault rate (10%) applies to TLB misses.
Probabilities:
TLB hit = 0.95
TLB miss = 0.05. Of these misses, page-fault rate = 0.10, so
TLB miss without page fault = 0.05 * 0.90 = 0.045
TLB miss with page fault = 0.05 * 0.10 = 0.005
Times for each case:
TLB hit (prob 0.95): 20 (TLB) + 100 (memory) = 120 ns
TLB miss, page present (prob 0.045): 20 (TLB) + 100 (page table in memory) + 100 (memory) = 220 ns
TLB miss with page fault (prob 0.005): 20 (TLB) + 5000 (read page from disk) + 0.2*5000 (average write-back) + 100 (memory after load) = 6120 ns
Expected (average) memory access time =
0.95 * 120 + 0.045 * 220 + 0.005 * 6120 = 114 + 9.9 + 30.6 = 154.5 ns
Answer: 154.5 ns (rounded to 1 decimal place).