A processor uses 36 bit physical addresses and 32 bit virtual addresses, with…

Answer: 25, 25 and 24

Explanation:

• Physical address width = 36 bits. Page size = 4 KB = 2^{12} bytes, so page offset = 12 bits. Physical frame number bits = 36 - 12 = 24 bits.

• Virtual address breakdown (given): first-level index = bits 30–31 = 2 bits; second-level index = bits 21–29 = 9 bits; third-level index = bits 12–20 = 9 bits; page offset = 12 bits.

• Third-level page table entries point to actual page frames. Therefore the number of bits required in a third-level PTE to address the page frame is the physical frame number bits = 24.

• Size of a level-3 page table: 2^{9} entries × 4 bytes = 512 × 4 = 2048 bytes = 2 KB. Similarly, each level-2 table is 2 KB. Since the page size is 4 KB, each such table occupies half a physical page.

• A pointer to a next-level table that can be placed in either half of a physical page must identify which half of the page contains the table in addition to the frame number. That requires one extra bit beyond the 24-bit frame number, i.e. 24 + 1 = 25 bits.

• Therefore: first-level PTE needs 25 bits to address the second-level table, second-level PTE needs 25 bits to address the third-level table, and third-level PTE needs 24 bits to address a page frame.

Note: If the OS forced each page table to be page-aligned (one table per 4 KB page), the extra half-page bit would not be needed and all entries would only require the 24-bit frame number. The question assumes tight packing that makes the tables occupy half a page, which is why the first two entries require 25 bits.