Consider an array multiplier for multiplying two n bit numbers. If each gate…
GATE · 2003 · CS
Consider an array multiplier for multiplying two n bit numbers. If each gate in the circuit has a unit delay, the total delay of the multiplier is
- A.
Θ(1)
- B.
Θ(log n)
- C.
Θ(n)
- D.
Θ(n2)
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