A half adder is implemented with XOR and AND gates. A full adder is…
2015
A half adder is implemented with XOR and AND gates. A full adder is implemented with two half adders and one OR gate. The propagation delay of an XOR gate is twice that of an AND/OR gate. The propagation delay of an AND/OR gate is 1.2 microseconds. A 4-bit ripple-carry binary adder is implemented by using four full adders. The total propagation time of this 4-bit binary adder in microseconds is____________.
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Correct answer: 12
Assumption (for 12 µs answer):
t_AND = t_OR = t_XOR = 1.2 µs
Full adder = two half adders + one OR
4-bit ripple adder = 4 full adders
Delay inside one full adder (carry path)
C1 = A AND B
→ ready at 1.2 µs
S1 = A XOR B
→ ready at 1.2 µs (because XOR = 1.2 µs)
C2 = S1 AND Cin
→ 1.2 + 1.2 = 2.4 µs
Cout = C1 OR C2
→ must wait for C2 (2.4 µs), then OR
→ 2.4 + 1.2 = 3.6 µs
So, carry propagation per full adder = 3.6 µs
Total delay of 4-bit ripple adder
Carry ripples through 3 full adders:
3 × 3.6 = 10.8 µs
Final MSB sum: XOR delay = 1.2 µs
Total delay = 10.8 + 1.2 = 12.0 µs
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