The following expression was to be realized using 2-input AND and OR gates.…
GATE · 2007 · IT
The following expression was to be realized using 2-input AND and OR gates. However, during the fabrication all 2-input AND gates were mistakenly substituted by 2-input NAND gates.
(a.b).c + (a'.c).d + (b.c).d + a. d
What is the function finally realized ?
- A.
1
- B.
a' + b' + c' + d'
- C.
a' + b + c' + d'
- D.
a' + b' + c + d'
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