Consider a processor P whose instruction set architecture is the load-store…
GATE · 2026 · CS · Set 1 · Computer Science & IT
Consider a processor P whose instruction set architecture is the load-store architecture. The instruction format is such that the first operand of any instruction is the destination operand.
Which one of the following sequences of instructions corresponds to the high-level language statement Z = X + Y ?
Note: X, Y, and Z are memory operands. R0, R1, and R2 are registers.
- A.
ADD Z, X, Y
- B.
LOAD R0, X
ADD Z, R0, Y
- C.
ADD R0, X, Y
STORE Z, R0
- D.
LOAD R0, X
LOAD R1, Y
ADD R2, R0, R1
STORE Z, R2
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